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clk: rk3399: Set empty for TCPHY assigned-clocks

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Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi
have SCLK_UPHY0_TCPDCORE, SCLK_UPHY1_TCPDCORE assigned-clocks
which are usually required for Linux and don't require to
handle them in U-Boot.

  assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
  assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;

So, mark them as empty in clock otherwise device probe on
those typec phy driver would fail.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jagan Teki 2020-05-26 11:32:06 +08:00 committed by Kever Yang
parent f7dd12a7e7
commit 80e191119e
1 changed files with 2 additions and 0 deletions
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2
drivers/clk/rockchip/clk_rk3399.c
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@ -1000,6 +1000,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
case ACLK_VOP1:
case HCLK_VOP1:
case HCLK_SD:
case SCLK_UPHY0_TCPDCORE:
case SCLK_UPHY1_TCPDCORE:
/**
* assigned-clocks handling won't require for vopl, so
* return 0 to satisfy clk_set_defaults during device probe.