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spi: altera: Zap endless loop

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The driver contained an endless loop when waiting for TX completion,
this is a bad idea since if the hardware fails, the loop might spin
forever. Add timeout and handle it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Pavel Machek <pavel@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This commit is contained in:
Marek Vasut 2014-10-22 21:56:01 +02:00 committed by Jagannadha Sutradharudu Teki
parent 37dcc130e0
commit 80d7333808
1 changed files with 11 additions and 2 deletions
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13
drivers/spi/altera_spi.c
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@ -129,6 +129,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
uint bytes = bitlen / 8;
const uchar *txp = dout;
uchar *rxp = din;
uint32_t reg, start;
debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
slave->bus, slave->cs, bitlen, bytes, flags);
@ -154,8 +155,16 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
debug("%s: tx:%x ", __func__, d);
writel(d, &altspi->regs->txdata);
while (!(readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK))
;
start = get_timer(0);
while (1) {
reg = readl(&altspi->regs->status);
if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
break;
if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
printf("%s: Transmission timed out!\n", __func__);
goto done;
}
}
d = readl(&altspi->regs->rxdata);
if (rxp)