dm: core: Correctly read <ranges> of simple-bus

At present we decode simple bus <ranges> using the following assumption:

- parent #address-cells 1
- child #address-cells 1
- child #size-cells 1

However this might not always be the case.

Update to use fdt_addr_t and fdt_size_t in 'struct simple_bus_plat', and
use fdt_read_ranges() to correctly decode it according to the actual
parent and child #address-cells / #size-cells under a Kconfig option
CONFIG_SIMPLE_BUS_CORRECT_RANGE which can be turned on for any board
that needs it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Bin Meng 2021-03-14 20:15:02 +08:00 committed by Priyanka Jain
parent a081546de9
commit 80279fa129
3 changed files with 41 additions and 10 deletions

View File

@ -235,6 +235,19 @@ config SPL_SIMPLE_BUS
Supports the 'simple-bus' driver, which is used on some systems
in SPL.
config SIMPLE_BUS_CORRECT_RANGE
bool "Decode the 'simple-bus' <range> by honoring the #address-cells and #size-cells"
depends on SIMPLE_BUS
help
Decoding the 'simple-bus' <range> by honoring the #address-cells
and #size-cells of parent/child bus. If unset, #address-cells of
parent bus is assumed to be 1, #address-cells and #size-cells of
child bus is also assumed to be 1, to save some spaces of using
an advanced API to decode the <range>, which benefits SPL image
builds that have size limits.
If you are unsure about this, Say N here.
config SIMPLE_PM_BUS
bool "Support simple-pm-bus driver"
depends on DM && OF_CONTROL && CLK && POWER_DOMAIN

View File

@ -4,8 +4,12 @@
*/
#include <common.h>
#include <asm/global_data.h>
#include <dm.h>
#include <dm/simple_bus.h>
#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
fdt_addr_t simple_bus_translate(struct udevice *dev, fdt_addr_t addr)
{
@ -22,16 +26,30 @@ static int simple_bus_post_bind(struct udevice *dev)
#if CONFIG_IS_ENABLED(OF_PLATDATA)
return 0;
#else
u32 cell[3];
struct simple_bus_plat *plat = dev_get_uclass_plat(dev);
int ret;
ret = dev_read_u32_array(dev, "ranges", cell, ARRAY_SIZE(cell));
if (!ret) {
struct simple_bus_plat *plat = dev_get_uclass_plat(dev);
if (CONFIG_IS_ENABLED(SIMPLE_BUS_CORRECT_RANGE)) {
uint64_t caddr, paddr, len;
plat->base = cell[0];
plat->target = cell[1];
plat->size = cell[2];
/* only read range index 0 */
ret = fdt_read_range((void *)gd->fdt_blob, dev_of_offset(dev),
0, &caddr, &paddr, &len);
if (!ret) {
plat->base = caddr;
plat->target = paddr;
plat->size = len;
}
} else {
u32 cell[3];
ret = dev_read_u32_array(dev, "ranges", cell,
ARRAY_SIZE(cell));
if (!ret) {
plat->base = cell[0];
plat->target = cell[1];
plat->size = cell[2];
}
}
return dm_scan_fdt_dev(dev);

View File

@ -7,9 +7,9 @@
#define __DM_SIMPLE_BUS_H
struct simple_bus_plat {
u32 base;
u32 size;
u32 target;
fdt_addr_t base;
fdt_size_t size;
fdt_addr_t target;
};
#endif