mirror of
https://github.com/u-boot/u-boot.git
synced 2024-12-04 01:53:27 +08:00
event: Convert arch_cpu_init_dm() to use events
Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
42fdcebf85
commit
7fe32b3442
@ -94,6 +94,7 @@ config NIOS2
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bool "Nios II architecture"
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select CPU
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select DM
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imply DM_EVENT
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select OF_CONTROL
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select SUPPORT_OF_CONTROL
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imply CMD_DM
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@ -113,6 +114,7 @@ config RISCV
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select DM
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imply DM_SERIAL
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imply DM_ETH
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imply DM_EVENT
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imply DM_MMC
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imply DM_SPI
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imply DM_SPI_FLASH
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@ -238,6 +240,7 @@ config X86
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imply CMD_SF_TEST
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imply CMD_ZBOOT
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imply DM_ETH
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imply DM_EVENT
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imply DM_GPIO
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imply DM_KEYBOARD
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imply DM_MMC
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@ -774,6 +774,7 @@ config ARCH_OMAP2PLUS
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select SUPPORT_SPL
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imply TI_SYSC if DM && OF_CONTROL
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imply FIT
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imply DM_EVENT
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config ARCH_MESON
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bool "Amlogic Meson"
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@ -818,6 +819,7 @@ config ARCH_IMX8
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select MACH_IMX
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select OF_CONTROL
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select ENABLE_ARM_SOC_BOOT0_HOOK
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imply DM_EVENT
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config ARCH_IMX8M
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bool "NXP i.MX8M platform"
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@ -831,6 +833,7 @@ config ARCH_IMX8M
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select DM
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select SUPPORT_SPL
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imply CMD_DM
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imply DM_EVENT
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config ARCH_IMX8ULP
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bool "NXP i.MX8ULP platform"
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@ -841,6 +844,7 @@ config ARCH_IMX8ULP
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select SUPPORT_SPL
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select GPIO_EXTRA_HEADER
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imply CMD_DM
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imply DM_EVENT
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config ARCH_IMXRT
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bool "NXP i.MXRT platform"
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@ -8,6 +8,7 @@
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#include <cpu.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <event.h>
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#include <init.h>
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#include <log.h>
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#include <asm/cache.h>
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@ -66,7 +67,7 @@ int arch_cpu_init(void)
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return 0;
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}
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int arch_cpu_init_dm(void)
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static int imx8_init_mu(void *ctx, struct event *event)
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{
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struct udevice *devp;
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int node, ret;
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@ -88,6 +89,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, imx8_init_mu);
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int print_bootinfo(void)
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{
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@ -7,6 +7,7 @@
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#include <common.h>
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#include <cpu_func.h>
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#include <event.h>
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#include <init.h>
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#include <log.h>
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#include <asm/arch/imx-regs.h>
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@ -494,7 +495,7 @@ static void imx_set_wdog_powerdown(bool enable)
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writew(enable, &wdog3->wmcr);
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}
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int arch_cpu_init_dm(void)
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static int imx8m_check_clock(void *ctx, struct event *event)
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{
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struct udevice *dev;
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int ret;
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@ -511,6 +512,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
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int arch_cpu_init(void)
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{
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@ -11,6 +11,7 @@
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/global_data.h>
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#include <efi_loader.h>
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#include <event.h>
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#include <spl.h>
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#include <asm/arch/rdc.h>
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#include <asm/arch/s400_api.h>
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@ -569,7 +570,7 @@ int arch_cpu_init(void)
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return 0;
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}
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int arch_cpu_init_dm(void)
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static int imx8ulp_check_mu(void *ctx, struct event *event)
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{
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struct udevice *devp;
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int node, ret;
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@ -584,6 +585,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu);
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#if defined(CONFIG_SPL_BUILD)
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__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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@ -11,6 +11,7 @@
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#include <dm.h>
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#include <debug_uart.h>
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#include <errno.h>
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#include <event.h>
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#include <init.h>
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#include <net.h>
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#include <ns16550.h>
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@ -596,7 +597,7 @@ void board_init_f(ulong dummy)
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#endif
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int arch_cpu_init_dm(void)
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static int am33xx_dm_post_init(void *ctx, struct event *event)
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{
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hw_data_init();
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#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
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@ -604,3 +605,4 @@ int arch_cpu_init_dm(void)
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#endif
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, am33xx_dm_post_init);
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@ -12,6 +12,7 @@
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <event.h>
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#include <fdtdec.h>
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#include <init.h>
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#include <spl.h>
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@ -239,11 +240,13 @@ void board_init_f(ulong dummy)
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}
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#endif
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int arch_cpu_init_dm(void)
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static int omap2_system_init(void *ctx, struct event *event)
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{
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early_system_init();
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, omap2_system_init);
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/*
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* Routine: wait_for_command_complete
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@ -130,6 +130,7 @@ config MACH_PIC32
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config TARGET_BOSTON
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bool "Support Boston"
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select DM
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imply DM_EVENT
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select DM_SERIAL
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select MIPS_CM
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select SYS_CACHE_SHIFT_6
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@ -7,6 +7,7 @@
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <event.h>
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#include <init.h>
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#include <malloc.h>
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#include <asm/global_data.h>
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@ -95,12 +96,13 @@ static void prefetch_init(void)
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}
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/* arch specific CPU init after DM */
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int arch_cpu_init_dm(void)
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static int pic32_flash_prefetch(void *ctx, struct event *event)
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{
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/* flash prefetch */
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prefetch_init();
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, pic32_flash_prefetch);
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/* Un-gate DDR2 modules (gated by default) */
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static void ddr2_pmd_ungate(void)
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@ -10,6 +10,7 @@
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#include <cpu_func.h>
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#include <dm.h>
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#include <errno.h>
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#include <event.h>
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#include <init.h>
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#include <irq_func.h>
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#include <asm/cache.h>
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@ -63,7 +64,7 @@ static void copy_exception_trampoline(void)
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}
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#endif
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int arch_cpu_init_dm(void)
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static int nios_cpu_setup(void *ctx, struct event *event)
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{
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struct udevice *dev;
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int ret;
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@ -79,6 +80,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup);
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static int altera_nios2_get_desc(const struct udevice *dev, char *buf,
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int size)
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@ -7,9 +7,11 @@
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#include <cpu.h>
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#include <dm.h>
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#include <dm/lists.h>
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#include <event.h>
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#include <init.h>
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#include <log.h>
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#include <asm/encoding.h>
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#include <asm/system.h>
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#include <dm/uclass-internal.h>
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#include <linux/bitops.h>
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@ -81,7 +83,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1)
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}
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#endif
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int arch_cpu_init_dm(void)
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int riscv_cpu_setup(void *ctx, struct event *event)
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{
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int ret;
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@ -133,6 +135,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, riscv_cpu_setup);
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int arch_early_init_r(void)
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{
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#ifndef __ASM_RISCV_SYSTEM_H
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#define __ASM_RISCV_SYSTEM_H
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struct event;
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/*
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* Interrupt configuring macros.
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*
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@ -14,4 +16,7 @@
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*
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*/
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/* Hook to set up the CPU (called from SPL too) */
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int riscv_cpu_setup(void *ctx, struct event *event);
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#endif /* __ASM_RISCV_SYSTEM_H */
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#include <spl.h>
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#include <asm/global_data.h>
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#include <asm/smp.h>
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#include <asm/system.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -27,7 +28,7 @@ __weak void board_init_f(ulong dummy)
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if (ret)
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panic("spl_early_init() failed: %d\n", ret);
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arch_cpu_init_dm();
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riscv_cpu_setup(NULL, NULL);
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preloader_console_init();
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@ -8,6 +8,7 @@
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#include <common.h>
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#include <cpu.h>
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#include <dm.h>
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#include <event.h>
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#include <init.h>
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#include <log.h>
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#include <pci.h>
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@ -44,7 +45,7 @@ static void hsuart_clock_set(void *base)
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* Configure the internal clock of both SIO HS-UARTs, if they are enabled
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* via FSP
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*/
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int arch_cpu_init_dm(void)
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static int baytrail_uart_init(void *ctx, struct event *event)
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{
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struct udevice *dev;
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void *base;
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@ -63,6 +64,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init);
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static void set_max_freq(void)
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{
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@ -8,6 +8,7 @@
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#include <common.h>
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#include <dm.h>
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#include <cpu.h>
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#include <event.h>
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#include <init.h>
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#include <log.h>
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#include <asm/cpu.h>
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@ -24,7 +25,7 @@
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#include <asm/arch/pch.h>
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#include <asm/arch/rcb.h>
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int arch_cpu_init_dm(void)
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static int broadwell_init_cpu(void *ctx, struct event *event)
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{
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struct udevice *dev;
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int ret;
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@ -41,6 +42,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu);
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void set_max_freq(void)
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{
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@ -14,6 +14,7 @@
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#include <cpu_func.h>
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#include <dm.h>
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#include <errno.h>
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#include <event.h>
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#include <fdtdec.h>
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#include <init.h>
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#include <log.h>
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@ -53,7 +54,7 @@ int arch_cpu_init(void)
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return x86_cpu_init_f();
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}
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int arch_cpu_init_dm(void)
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static int ivybridge_cpu_init(void *ctx, struct event *ev)
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{
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struct pci_controller *hose;
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struct udevice *bus, *dev;
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@ -85,6 +86,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init);
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#define PCH_EHCI0_TEMP_BAR0 0xe8000000
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#define PCH_EHCI1_TEMP_BAR0 0xe8000400
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@ -5,6 +5,7 @@
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#include <common.h>
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#include <cpu_func.h>
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#include <event.h>
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#include <init.h>
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#include <mmc.h>
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#include <asm/cache.h>
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@ -247,7 +248,7 @@ int arch_cpu_init(void)
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return 0;
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}
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int arch_cpu_init_dm(void)
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static int quark_init_pcie(void *ctx, struct event *event)
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{
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/*
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* Initialize PCIe controller
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@ -262,6 +263,7 @@ int arch_cpu_init_dm(void)
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return 0;
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}
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EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie);
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int checkcpu(void)
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{
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@ -60,4 +60,12 @@ int fsp_silicon_init(bool s3wake, bool use_spi_flash);
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typedef asmlinkage int (*fsp_silicon_init_func)(struct fsps_upd *params);
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/**
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* fsp_setup_pinctrl() - Set up the pinctrl for FSP
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*
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* @ctx: Event context (not used)
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* @event: Event information (not used)
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*/
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int fsp_setup_pinctrl(void *ctx, struct event *event);
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#endif
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@ -9,6 +9,7 @@
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#include <bootstage.h>
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#include <cbfs.h>
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#include <dm.h>
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#include <event.h>
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#include <init.h>
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#include <log.h>
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#include <spi.h>
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@ -18,7 +19,7 @@
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#include <dm/uclass-internal.h>
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#include <asm/fsp2/fsp_internal.h>
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int arch_cpu_init_dm(void)
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int fsp_setup_pinctrl(void *ctx, struct event *event)
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{
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struct udevice *dev;
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ofnode node;
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@ -41,6 +42,7 @@ int arch_cpu_init_dm(void)
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return ret;
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}
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EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl);
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#if !defined(CONFIG_TPL_BUILD)
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binman_sym_declare(ulong, intel_fsp_m, image_pos);
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@ -17,6 +17,7 @@
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#include <syscon.h>
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#include <asm/cpu.h>
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#include <asm/cpu_common.h>
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#include <asm/fsp2/fsp_api.h>
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#include <asm/global_data.h>
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#include <asm/mrccache.h>
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#include <asm/mtrr.h>
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@ -27,7 +28,7 @@
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DECLARE_GLOBAL_DATA_PTR;
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__weak int arch_cpu_init_dm(void)
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__weak int fsp_setup_pinctrl(void *ctx, struct event *event)
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{
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return 0;
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}
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@ -89,7 +90,7 @@ static int x86_spl_init(void)
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return ret;
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}
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#ifndef CONFIG_TPL
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ret = arch_cpu_init_dm();
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ret = fsp_setup_pinctrl(NULL, NULL);
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if (ret) {
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debug("%s: arch_cpu_init_dm() failed\n", __func__);
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return ret;
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@ -19,11 +19,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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__weak int arch_cpu_init_dm(void)
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{
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return 0;
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}
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static int x86_tpl_init(void)
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{
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int ret;
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@ -44,11 +39,6 @@ static int x86_tpl_init(void)
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debug("%s: arch_cpu_init() failed\n", __func__);
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return ret;
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}
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ret = arch_cpu_init_dm();
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if (ret) {
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debug("%s: arch_cpu_init_dm() failed\n", __func__);
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return ret;
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}
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preloader_console_init();
|
||||
|
||||
return 0;
|
||||
|
@ -803,11 +803,6 @@ __weak int reserve_arch(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
__weak int arch_cpu_init_dm(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
__weak int checkcpu(void)
|
||||
{
|
||||
return 0;
|
||||
@ -848,7 +843,6 @@ static const init_fnc_t init_sequence_f[] = {
|
||||
arch_cpu_init, /* basic arch cpu dependent setup */
|
||||
mach_cpu_init, /* SoC/machine dependent CPU setup */
|
||||
initf_dm,
|
||||
arch_cpu_init_dm,
|
||||
#if defined(CONFIG_BOARD_EARLY_INIT_F)
|
||||
board_early_init_f,
|
||||
#endif
|
||||
|
@ -26,6 +26,7 @@ const char *const type_name[] = {
|
||||
"test",
|
||||
|
||||
/* Events related to driver model */
|
||||
"dm_post_init",
|
||||
"dm_pre_probe",
|
||||
"dm_post_probe",
|
||||
"dm_pre_remove",
|
||||
|
@ -404,6 +404,11 @@ int dm_init_and_scan(bool pre_reloc_only)
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
if (CONFIG_IS_ENABLED(DM_EVENT)) {
|
||||
ret = event_notify_null(EVT_DM_POST_INIT);
|
||||
if (ret)
|
||||
return log_msg_ret("ev", ret);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -20,6 +20,7 @@ enum event_t {
|
||||
EVT_TEST,
|
||||
|
||||
/* Events related to driver model */
|
||||
EVT_DM_POST_INIT,
|
||||
EVT_DM_PRE_PROBE,
|
||||
EVT_DM_POST_PROBE,
|
||||
EVT_DM_PRE_REMOVE,
|
||||
|
@ -45,17 +45,6 @@ void board_init_f(ulong dummy);
|
||||
*/
|
||||
int arch_cpu_init(void);
|
||||
|
||||
/**
|
||||
* arch_cpu_init_dm() - init CPU after driver model is available
|
||||
*
|
||||
* This is called immediately after driver model is available before
|
||||
* relocation. This is similar to arch_cpu_init() but is able to reference
|
||||
* devices
|
||||
*
|
||||
* Return: 0 if OK, -ve on error
|
||||
*/
|
||||
int arch_cpu_init_dm(void);
|
||||
|
||||
/**
|
||||
* mach_cpu_init() - SoC/machine dependent CPU setup
|
||||
*
|
||||
|
Loading…
Reference in New Issue
Block a user