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mips: octeon: Add cvmx-helper-rgmii.c
Import cvmx-helper-rgmii.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Aaron Williams
Stefan Roese
parent
bfa83aa3e1
commit
7f0f8430f5
398
arch/mips/mach-octeon/cvmx-helper-rgmii.c
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398
arch/mips/mach-octeon/cvmx-helper-rgmii.c
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@ -0,0 +1,398 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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* Functions for RGMII/GMII/MII initialization, configuration,
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* and monitoring.
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*/
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#include <log.h>
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#include <time.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/cvmx-pcie.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-asxx-defs.h>
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#include <mach/cvmx-dbg-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-npi-defs.h>
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#include <mach/cvmx-pko-defs.h>
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/**
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* @INTERNAL
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* Probe RGMII ports and determine the number present
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*
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* @param xiface Interface to probe
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*
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* @return Number of RGMII/GMII/MII ports (0-4).
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*/
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int __cvmx_helper_rgmii_probe(int xiface)
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{
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struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
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int num_ports = 0;
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union cvmx_gmxx_inf_mode mode;
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mode.u64 = csr_rd(CVMX_GMXX_INF_MODE(xi.interface));
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if (mode.s.type)
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debug("ERROR: Unsupported Octeon model in %s\n", __func__);
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else
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debug("ERROR: Unsupported Octeon model in %s\n", __func__);
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return num_ports;
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}
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/**
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* @INTERNAL
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* Configure all of the ASX, GMX, and PKO regsiters required
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* to get RGMII to function on the supplied interface.
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*
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* @param xiface PKO Interface to configure (0 or 1)
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*
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* @return Zero on success
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*/
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int __cvmx_helper_rgmii_enable(int xiface)
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{
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struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
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int interface = xi.interface;
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int num_ports = cvmx_helper_ports_on_interface(interface);
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int port;
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union cvmx_gmxx_inf_mode mode;
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union cvmx_asxx_tx_prt_en asx_tx;
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union cvmx_asxx_rx_prt_en asx_rx;
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mode.u64 = csr_rd(CVMX_GMXX_INF_MODE(interface));
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if (num_ports == -1)
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return -1;
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if (mode.s.en == 0)
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return -1;
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/* Configure the ASX registers needed to use the RGMII ports */
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asx_tx.u64 = 0;
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asx_tx.s.prt_en = cvmx_build_mask(num_ports);
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csr_wr(CVMX_ASXX_TX_PRT_EN(interface), asx_tx.u64);
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asx_rx.u64 = 0;
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asx_rx.s.prt_en = cvmx_build_mask(num_ports);
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csr_wr(CVMX_ASXX_RX_PRT_EN(interface), asx_rx.u64);
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/* Configure the GMX registers needed to use the RGMII ports */
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for (port = 0; port < num_ports; port++) {
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/*
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* Configure more flexible RGMII preamble
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* checking. Pass 1 doesn't support this feature.
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*/
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union cvmx_gmxx_rxx_frm_ctl frm_ctl;
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frm_ctl.u64 = csr_rd(CVMX_GMXX_RXX_FRM_CTL(port, interface));
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/* New field, so must be compile time */
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frm_ctl.s.pre_free = 1;
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csr_wr(CVMX_GMXX_RXX_FRM_CTL(port, interface), frm_ctl.u64);
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/*
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* Each pause frame transmitted will ask for about 10M
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* bit times before resume. If buffer space comes
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* available before that time has expired, an XON
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* pause frame (0 time) will be transmitted to restart
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* the flow.
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*/
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csr_wr(CVMX_GMXX_TXX_PAUSE_PKT_TIME(port, interface), 20000);
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csr_wr(CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(port, interface),
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19000);
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csr_wr(CVMX_ASXX_TX_CLK_SETX(port, interface), 24);
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csr_wr(CVMX_ASXX_RX_CLK_SETX(port, interface), 24);
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}
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__cvmx_helper_setup_gmx(interface, num_ports);
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/* enable the ports now */
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for (port = 0; port < num_ports; port++) {
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union cvmx_gmxx_prtx_cfg gmx_cfg;
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cvmx_helper_link_autoconf(
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cvmx_helper_get_ipd_port(interface, port));
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gmx_cfg.u64 = csr_rd(CVMX_GMXX_PRTX_CFG(port, interface));
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gmx_cfg.s.en = 1;
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csr_wr(CVMX_GMXX_PRTX_CFG(port, interface), gmx_cfg.u64);
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}
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return 0;
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}
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/**
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* @INTERNAL
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* Return the link state of an IPD/PKO port as returned by
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* auto negotiation. The result of this function may not match
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* Octeon's link config if auto negotiation has changed since
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* the last call to cvmx_helper_link_set().
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*
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* @param ipd_port IPD/PKO port to query
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*
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* @return Link state
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*/
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cvmx_helper_link_info_t __cvmx_helper_rgmii_link_get(int ipd_port)
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{
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int interface = cvmx_helper_get_interface_num(ipd_port);
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int index = cvmx_helper_get_interface_index_num(ipd_port);
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union cvmx_asxx_prt_loop asxx_prt_loop;
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asxx_prt_loop.u64 = csr_rd(CVMX_ASXX_PRT_LOOP(interface));
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if (asxx_prt_loop.s.int_loop & (1 << index)) {
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/* Force 1Gbps full duplex on internal loopback */
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cvmx_helper_link_info_t result;
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result.u64 = 0;
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result.s.full_duplex = 1;
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result.s.link_up = 1;
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result.s.speed = 1000;
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return result;
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} else {
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return __cvmx_helper_board_link_get(ipd_port);
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}
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}
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/**
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* @INTERNAL
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* Return the link state of an IPD/PKO port as returned by
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* auto negotiation. The result of this function may not match
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* Octeon's link config if auto negotiation has changed since
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* the last call to cvmx_helper_link_set().
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*
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* @param ipd_port IPD/PKO port to query
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*
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* @return Link state
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*/
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cvmx_helper_link_info_t __cvmx_helper_gmii_link_get(int ipd_port)
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{
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cvmx_helper_link_info_t result;
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int index = cvmx_helper_get_interface_index_num(ipd_port);
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if (index == 0) {
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result = __cvmx_helper_rgmii_link_get(ipd_port);
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} else {
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result.s.full_duplex = 1;
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result.s.link_up = 1;
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result.s.speed = 1000;
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}
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return result;
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}
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/**
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* @INTERNAL
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* Configure an IPD/PKO port for the specified link state. This
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* function does not influence auto negotiation at the PHY level.
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* The passed link state must always match the link state returned
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* by cvmx_helper_link_get(). It is normally best to use
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* cvmx_helper_link_autoconf() instead.
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*
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* @param ipd_port IPD/PKO port to configure
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* @param link_info The new link state
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*
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* @return Zero on success, negative on failure
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*/
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int __cvmx_helper_rgmii_link_set(int ipd_port,
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cvmx_helper_link_info_t link_info)
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{
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int result = 0;
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int interface = cvmx_helper_get_interface_num(ipd_port);
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int index = cvmx_helper_get_interface_index_num(ipd_port);
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union cvmx_gmxx_prtx_cfg original_gmx_cfg;
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union cvmx_gmxx_prtx_cfg new_gmx_cfg;
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union cvmx_pko_mem_queue_qos pko_mem_queue_qos;
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union cvmx_pko_mem_queue_qos pko_mem_queue_qos_save[16];
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union cvmx_gmxx_tx_ovr_bp gmx_tx_ovr_bp;
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union cvmx_gmxx_tx_ovr_bp gmx_tx_ovr_bp_save;
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int i;
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/* Read the current settings so we know the current enable state */
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original_gmx_cfg.u64 = csr_rd(CVMX_GMXX_PRTX_CFG(index, interface));
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new_gmx_cfg = original_gmx_cfg;
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/* Disable the lowest level RX */
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csr_wr(CVMX_ASXX_RX_PRT_EN(interface),
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csr_rd(CVMX_ASXX_RX_PRT_EN(interface)) & ~(1 << index));
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memset(pko_mem_queue_qos_save, 0, sizeof(pko_mem_queue_qos_save));
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/* Disable all queues so that TX should become idle */
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for (i = 0; i < cvmx_pko_get_num_queues(ipd_port); i++) {
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int queue = cvmx_pko_get_base_queue(ipd_port) + i;
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csr_wr(CVMX_PKO_REG_READ_IDX, queue);
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pko_mem_queue_qos.u64 = csr_rd(CVMX_PKO_MEM_QUEUE_QOS);
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pko_mem_queue_qos.s.pid = ipd_port;
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pko_mem_queue_qos.s.qid = queue;
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pko_mem_queue_qos_save[i] = pko_mem_queue_qos;
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pko_mem_queue_qos.s.qos_mask = 0;
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csr_wr(CVMX_PKO_MEM_QUEUE_QOS, pko_mem_queue_qos.u64);
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}
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/* Disable backpressure */
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gmx_tx_ovr_bp.u64 = csr_rd(CVMX_GMXX_TX_OVR_BP(interface));
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gmx_tx_ovr_bp_save = gmx_tx_ovr_bp;
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gmx_tx_ovr_bp.s.bp &= ~(1 << index);
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gmx_tx_ovr_bp.s.en |= 1 << index;
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csr_wr(CVMX_GMXX_TX_OVR_BP(interface), gmx_tx_ovr_bp.u64);
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csr_rd(CVMX_GMXX_TX_OVR_BP(interface));
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/*
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* Poll the GMX state machine waiting for it to become
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* idle. Preferably we should only change speed when it is
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* idle. If it doesn't become idle we will still do the speed
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* change, but there is a slight chance that GMX will
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* lockup.
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*/
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csr_wr(CVMX_NPI_DBG_SELECT, interface * 0x800 + index * 0x100 + 0x880);
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CVMX_WAIT_FOR_FIELD64(CVMX_DBG_DATA, cvmx_dbg_data_t, data & 7, ==, 0,
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10000);
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CVMX_WAIT_FOR_FIELD64(CVMX_DBG_DATA, cvmx_dbg_data_t, data & 0xf, ==, 0,
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10000);
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/* Disable the port before we make any changes */
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new_gmx_cfg.s.en = 0;
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csr_wr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
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csr_rd(CVMX_GMXX_PRTX_CFG(index, interface));
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/* Set full/half duplex */
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if (!link_info.s.link_up)
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/* Force full duplex on down links */
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new_gmx_cfg.s.duplex = 1;
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else
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new_gmx_cfg.s.duplex = link_info.s.full_duplex;
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/* Set the link speed. Anything unknown is set to 1Gbps */
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if (link_info.s.speed == 10) {
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new_gmx_cfg.s.slottime = 0;
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new_gmx_cfg.s.speed = 0;
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} else if (link_info.s.speed == 100) {
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new_gmx_cfg.s.slottime = 0;
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new_gmx_cfg.s.speed = 0;
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} else {
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new_gmx_cfg.s.slottime = 1;
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new_gmx_cfg.s.speed = 1;
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}
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/* Adjust the clocks */
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if (link_info.s.speed == 10) {
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csr_wr(CVMX_GMXX_TXX_CLK(index, interface), 50);
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csr_wr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
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csr_wr(CVMX_GMXX_TXX_BURST(index, interface), 0);
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} else if (link_info.s.speed == 100) {
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csr_wr(CVMX_GMXX_TXX_CLK(index, interface), 5);
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csr_wr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
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csr_wr(CVMX_GMXX_TXX_BURST(index, interface), 0);
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} else {
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csr_wr(CVMX_GMXX_TXX_CLK(index, interface), 1);
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csr_wr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
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csr_wr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
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}
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/* Do a read to make sure all setup stuff is complete */
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csr_rd(CVMX_GMXX_PRTX_CFG(index, interface));
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/* Save the new GMX setting without enabling the port */
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csr_wr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
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/* Enable the lowest level RX */
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if (link_info.s.link_up)
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csr_wr(CVMX_ASXX_RX_PRT_EN(interface),
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csr_rd(CVMX_ASXX_RX_PRT_EN(interface)) | (1 << index));
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/* Re-enable the TX path */
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for (i = 0; i < cvmx_pko_get_num_queues(ipd_port); i++) {
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int queue = cvmx_pko_get_base_queue(ipd_port) + i;
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csr_wr(CVMX_PKO_REG_READ_IDX, queue);
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csr_wr(CVMX_PKO_MEM_QUEUE_QOS, pko_mem_queue_qos_save[i].u64);
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}
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/* Restore backpressure */
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csr_wr(CVMX_GMXX_TX_OVR_BP(interface), gmx_tx_ovr_bp_save.u64);
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/* Restore the GMX enable state. Port config is complete */
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new_gmx_cfg.s.en = original_gmx_cfg.s.en;
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csr_wr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
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return result;
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}
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/**
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* @INTERNAL
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* Configure a port for internal and/or external loopback. Internal loopback
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* causes packets sent by the port to be received by Octeon. External loopback
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* causes packets received from the wire to sent out again.
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*
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* @param ipd_port IPD/PKO port to loopback.
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* @param enable_internal
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* Non zero if you want internal loopback
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* @param enable_external
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* Non zero if you want external loopback
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*
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* @return Zero on success, negative on failure.
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*/
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int __cvmx_helper_rgmii_configure_loopback(int ipd_port, int enable_internal,
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int enable_external)
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{
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int interface = cvmx_helper_get_interface_num(ipd_port);
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int index = cvmx_helper_get_interface_index_num(ipd_port);
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int original_enable;
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union cvmx_gmxx_prtx_cfg gmx_cfg;
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union cvmx_asxx_prt_loop asxx_prt_loop;
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/* Read the current enable state and save it */
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gmx_cfg.u64 = csr_rd(CVMX_GMXX_PRTX_CFG(index, interface));
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original_enable = gmx_cfg.s.en;
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/* Force port to be disabled */
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gmx_cfg.s.en = 0;
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if (enable_internal) {
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/* Force speed if we're doing internal loopback */
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gmx_cfg.s.duplex = 1;
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gmx_cfg.s.slottime = 1;
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gmx_cfg.s.speed = 1;
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csr_wr(CVMX_GMXX_TXX_CLK(index, interface), 1);
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csr_wr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
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csr_wr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
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}
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csr_wr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
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/* Set the loopback bits */
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asxx_prt_loop.u64 = csr_rd(CVMX_ASXX_PRT_LOOP(interface));
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if (enable_internal)
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asxx_prt_loop.s.int_loop |= 1 << index;
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else
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asxx_prt_loop.s.int_loop &= ~(1 << index);
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if (enable_external)
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asxx_prt_loop.s.ext_loop |= 1 << index;
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else
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asxx_prt_loop.s.ext_loop &= ~(1 << index);
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csr_wr(CVMX_ASXX_PRT_LOOP(interface), asxx_prt_loop.u64);
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/* Force enables in internal loopback */
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if (enable_internal) {
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u64 tmp;
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tmp = csr_rd(CVMX_ASXX_TX_PRT_EN(interface));
|
||||
csr_wr(CVMX_ASXX_TX_PRT_EN(interface), (1 << index) | tmp);
|
||||
tmp = csr_rd(CVMX_ASXX_RX_PRT_EN(interface));
|
||||
csr_wr(CVMX_ASXX_RX_PRT_EN(interface), (1 << index) | tmp);
|
||||
original_enable = 1;
|
||||
}
|
||||
|
||||
/* Restore the enable state */
|
||||
gmx_cfg.s.en = original_enable;
|
||||
csr_wr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user