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https://github.com/u-boot/u-boot.git
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arm: Remove portuxg20, stamp9g20 boards
These boards have not been converted to generic board by the deadline. Remove them. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
Tom Rini
parent
f6eac00aba
commit
79d19734a9
@ -43,10 +43,6 @@ config TARGET_PM9263
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bool "Ronetix pm9263 board"
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select CPU_ARM926EJS
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config TARGET_STAMP9G20
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bool "Support stamp9g20"
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select CPU_ARM926EJS
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config TARGET_AT91SAM9M10G45EK
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bool "Atmel AT91SAM9M10G45-EK board"
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select CPU_ARM926EJS
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@ -147,6 +143,5 @@ source "board/ronetix/pm9g45/Kconfig"
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source "board/siemens/corvus/Kconfig"
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source "board/siemens/taurus/Kconfig"
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source "board/siemens/smartweb/Kconfig"
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source "board/taskit/stamp9g20/Kconfig"
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endif
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@ -1,12 +0,0 @@
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if TARGET_STAMP9G20
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config SYS_BOARD
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default "stamp9g20"
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config SYS_VENDOR
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default "taskit"
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config SYS_CONFIG_NAME
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default "stamp9g20"
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endif
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@ -1,7 +0,0 @@
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STAMP9G20 BOARD
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M: Markus Hubig <mhubig@imko.de>
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S: Maintained
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F: board/taskit/stamp9g20/
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F: include/configs/stamp9g20.h
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F: configs/portuxg20_defconfig
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F: configs/stamp9g20_defconfig
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@ -1,17 +0,0 @@
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
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# Stelian Pop <stelian@popies.net>
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# Lead Tech Design <www.leadtechdesign.com>
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#
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# (C) Copyright 2012
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# Markus Hubig <mhubig@imko.de>
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# IMKO GmbH <www.imko.de>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += stamp9g20.o
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obj-y += led.o
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@ -1,122 +0,0 @@
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/*
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* Copyright (c) 2009 Wind River Systems, Inc.
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* Tom Rix <Tom.Rix@windriver.com>
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* (C) Copyright 2009
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* Eric Benard <eric@eukrea.com>
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*
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* (C) Copyright 2012
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* Markus Hubig <mhubig@imko.de>
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* IMKO GmbH <www.imko.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/at91_pmc.h>
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#include <status_led.h>
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static unsigned int saved_state[3] = {STATUS_LED_OFF,
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STATUS_LED_OFF, STATUS_LED_OFF};
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void coloured_LED_init(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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/* Enable the clock */
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writel(ATMEL_ID_PIOC, &pmc->pcer);
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at91_set_gpio_output(CONFIG_RED_LED, 1);
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at91_set_gpio_output(CONFIG_GREEN_LED, 1);
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at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
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at91_set_gpio_value(CONFIG_RED_LED, 0);
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at91_set_gpio_value(CONFIG_GREEN_LED, 1);
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at91_set_gpio_value(CONFIG_YELLOW_LED, 0);
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}
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void red_led_on(void)
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{
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at91_set_gpio_value(CONFIG_RED_LED, 1);
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saved_state[STATUS_LED_RED] = STATUS_LED_ON;
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}
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void red_led_off(void)
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{
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at91_set_gpio_value(CONFIG_RED_LED, 0);
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saved_state[STATUS_LED_RED] = STATUS_LED_OFF;
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}
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void green_led_on(void)
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{
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at91_set_gpio_value(CONFIG_GREEN_LED, 1);
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saved_state[STATUS_LED_GREEN] = STATUS_LED_ON;
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}
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void green_led_off(void)
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{
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at91_set_gpio_value(CONFIG_GREEN_LED, 0);
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saved_state[STATUS_LED_GREEN] = STATUS_LED_OFF;
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}
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void yellow_led_on(void)
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{
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at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
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saved_state[STATUS_LED_YELLOW] = STATUS_LED_ON;
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}
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void yellow_led_off(void)
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{
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at91_set_gpio_value(CONFIG_YELLOW_LED, 0);
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saved_state[STATUS_LED_YELLOW] = STATUS_LED_OFF;
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}
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void __led_init(led_id_t mask, int state)
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{
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__led_set(mask, state);
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}
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void __led_toggle(led_id_t mask)
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{
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if (STATUS_LED_RED == mask) {
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if (STATUS_LED_ON == saved_state[STATUS_LED_RED])
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red_led_off();
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else
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red_led_on();
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} else if (STATUS_LED_GREEN == mask) {
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if (STATUS_LED_ON == saved_state[STATUS_LED_GREEN])
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green_led_off();
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else
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green_led_on();
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} else if (STATUS_LED_YELLOW == mask) {
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if (STATUS_LED_ON == saved_state[STATUS_LED_YELLOW])
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yellow_led_off();
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else
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yellow_led_on();
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}
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}
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void __led_set(led_id_t mask, int state)
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{
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if (STATUS_LED_RED == mask) {
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if (STATUS_LED_ON == state)
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red_led_on();
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else
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red_led_off();
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} else if (STATUS_LED_GREEN == mask) {
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if (STATUS_LED_ON == state)
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green_led_on();
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else
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green_led_off();
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} else if (STATUS_LED_YELLOW == mask) {
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if (STATUS_LED_ON == state)
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yellow_led_on();
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else
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yellow_led_off();
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}
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}
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@ -1,159 +0,0 @@
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Achim Ehrlich <aehrlich@taskit.de>
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* taskit GmbH <www.taskit.de>
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*
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* (C) Copyright 2012-
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* Markus Hubig <mhubig@imko.de>
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* IMKO GmbH <www.imko.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91sam9260_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/gpio.h>
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#include <watchdog.h>
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#ifdef CONFIG_MACB
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# include <net.h>
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# include <netdev.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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static void stamp9G20_nand_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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unsigned long csa;
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/* Assign CS3 to NAND/SmartMedia Interface */
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csa = readl(&matrix->ebicsa);
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
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writel(csa, &matrix->ebicsa);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(2),
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&smc->cs[3].mode);
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/* Configure RDY/BSY */
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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/* Enable NandFlash */
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#ifdef CONFIG_MACB
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static void stamp9G20_macb_hw_init(void)
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{
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struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
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/* Enable the PHY Chip via PA26 on the Stamp 2 Adaptor */
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at91_set_gpio_output(AT91_PIN_PA26, 0);
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/*
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* Disable pull-up on:
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* RXDV (PA17) => PHY normal mode (not Test mode)
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* ERX0 (PA14) => PHY ADDR0
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* ERX1 (PA15) => PHY ADDR1
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* ERX2 (PA25) => PHY ADDR2
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* ERX3 (PA26) => PHY ADDR3
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* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
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*
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* PHY has internal pull-down
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*/
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writel(pin_to_mask(AT91_PIN_PA14) |
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pin_to_mask(AT91_PIN_PA15) |
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pin_to_mask(AT91_PIN_PA17) |
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pin_to_mask(AT91_PIN_PA18) |
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pin_to_mask(AT91_PIN_PA28),
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&pioa->pudr);
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at91_phy_reset();
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/* Re-enable pull-up */
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writel(pin_to_mask(AT91_PIN_PA14) |
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pin_to_mask(AT91_PIN_PA15) |
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pin_to_mask(AT91_PIN_PA17) |
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pin_to_mask(AT91_PIN_PA18) |
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pin_to_mask(AT91_PIN_PA28),
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&pioa->puer);
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/* Initialize EMAC=MACB hardware */
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at91_macb_hw_init();
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}
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#endif /* CONFIG_MACB */
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int board_early_init_f(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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/* Enable clocks for all PIOs */
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writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
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(1 << ATMEL_ID_PIOC), &pmc->pcer);
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return 0;
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}
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int board_postclk_init(void)
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{
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/*
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* Initialize the serial interface here, because be need a running
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* timer to set PC9 to high and wait for some time to enable the
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* level converter of the RS232 interface on the PortuxG20 board.
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*/
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#ifdef CONFIG_PORTUXG20
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at91_set_gpio_output(AT91_PIN_PC9, 1);
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mdelay(1);
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#endif
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at91_seriald_hw_init();
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return 0;
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}
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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stamp9G20_nand_hw_init();
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#ifdef CONFIG_MACB
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stamp9G20_macb_hw_init();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size(
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(void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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#ifdef CONFIG_MACB
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int board_eth_init(bd_t *bis)
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{
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return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
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}
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#endif /* CONFIG_MACB */
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@ -1,10 +0,0 @@
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CONFIG_ARM=y
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CONFIG_ARCH_AT91=y
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CONFIG_TARGET_STAMP9G20=y
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CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,PORTUXG20"
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_LOADS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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# CONFIG_CMD_SETEXPR is not set
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@ -1,11 +0,0 @@
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CONFIG_ARM=y
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CONFIG_ARCH_AT91=y
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CONFIG_TARGET_STAMP9G20=y
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CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_LOADS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_SYS_PROMPT="U-Boot> "
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@ -1,244 +0,0 @@
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2010
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* Achim Ehrlich <aehrlich@taskit.de>
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* taskit GmbH <www.taskit.de>
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*
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* (C) Copyright 2012
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* Markus Hubig <mhubig@imko.de>
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* IMKO GmbH <www.imko.de>
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*
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* Configuation settings for the stamp9g20 CPU module.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* SoC must be defined first, before hardware.h is included.
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* In this case SoC is defined in boards.cfg.
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*/
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#include <asm/hardware.h>
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/*
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* Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
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* program. Since the linker has to swallow that define, we must use a pure
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* hex number here!
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*/
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#define CONFIG_SYS_TEXT_BASE 0x23f00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
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/* misc settings */
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#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
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#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
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#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
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#define CONFIG_BOARD_EARLY_INIT_f /* call board_early_init_f() */
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#define CONFIG_BOARD_POSTCLK_INIT /* call board_postclk_init() */
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#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */
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/* setting board specific options */
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#ifdef CONFIG_PORTUXG20
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# define CONFIG_MACH_TYPE MACH_TYPE_PORTUXG20
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# define CONFIG_MACB
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#else
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# define CONFIG_MACH_TYPE MACH_TYPE_STAMP9G20
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#endif
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/*
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* SDRAM: 1 bank, 64 MB, base address 0x20000000
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* Already initialized before u-boot gets started.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE (64 << 20)
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/*
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* Perform a SDRAM Memtest from the start of SDRAM
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* till the beginning of the U-Boot position in RAM.
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*/
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN \
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ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000)
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/*
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* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
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* leaving the correct space for initial global data structure above that
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* address while providing maximum stack area below.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash settings */
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
|
||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
|
||||
|
||||
/* general purpose I/O */
|
||||
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
|
||||
#define CONFIG_AT91_GPIO /* enable the GPIO features */
|
||||
#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
|
||||
|
||||
/* serial console */
|
||||
#define CONFIG_ATMEL_USART
|
||||
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
|
||||
#define CONFIG_USART_ID ATMEL_ID_SYS
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/* LED configuration */
|
||||
#define CONFIG_STATUS_LED
|
||||
#define CONFIG_BOARD_SPECIFIC_LED
|
||||
|
||||
/* The LED PINs */
|
||||
#define CONFIG_RED_LED AT91_PIN_PC5
|
||||
#define CONFIG_GREEN_LED AT91_PIN_PC4
|
||||
#define CONFIG_YELLOW_LED AT91_PIN_PC10
|
||||
|
||||
#define STATUS_LED_RED 0
|
||||
#define STATUS_LED_GREEN 1
|
||||
#define STATUS_LED_YELLOW 2
|
||||
|
||||
/* Red LED */
|
||||
#define STATUS_LED_BIT STATUS_LED_RED
|
||||
#define STATUS_LED_STATE STATUS_LED_OFF
|
||||
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
|
||||
|
||||
/* Green LED */
|
||||
#define STATUS_LED_BIT1 STATUS_LED_GREEN
|
||||
#define STATUS_LED_STATE1 STATUS_LED_ON
|
||||
#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
|
||||
|
||||
/* Yellow LED */
|
||||
#define STATUS_LED_BIT2 STATUS_LED_YELLOW
|
||||
#define STATUS_LED_STATE2 STATUS_LED_OFF
|
||||
#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
|
||||
|
||||
/* Boot status LED */
|
||||
#define STATUS_LED_BOOT STATUS_LED_GREEN
|
||||
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*
|
||||
* PortuxG20 has always ethernet but for Stamp9G20 you
|
||||
* can enable it here if your baseboard features ethernet.
|
||||
*/
|
||||
|
||||
#define CONFIG_MACB
|
||||
#define CONFIG_USB_HOST_ETHER
|
||||
#define CONFIG_USB_ETHER_ASIX
|
||||
#define CONFIG_USB_ETHER_MCS7830
|
||||
|
||||
#ifdef CONFIG_MACB
|
||||
# define CONFIG_RMII /* use reduced MII inteface */
|
||||
# define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
|
||||
#define CONFIG_AT91_WANTS_COMMON_PHY
|
||||
|
||||
/* BOOTP and DHCP options */
|
||||
# define CONFIG_BOOTP_BOOTFILESIZE
|
||||
# define CONFIG_BOOTP_BOOTPATH
|
||||
# define CONFIG_BOOTP_GATEWAY
|
||||
# define CONFIG_BOOTP_HOSTNAME
|
||||
# define CONFIG_NFSBOOTCOMMAND \
|
||||
"setenv autoload yes; setenv autoboot yes; " \
|
||||
"setenv bootargs ${basicargs} ${mtdparts} " \
|
||||
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
|
||||
"dhcp"
|
||||
#endif /* CONFIG_MACB */
|
||||
|
||||
/* Enable the watchdog */
|
||||
#define CONFIG_AT91SAM9_WATCHDOG
|
||||
#define CONFIG_HW_WATCHDOG
|
||||
|
||||
/* USB configuration */
|
||||
#define CONFIG_USB_ATMEL
|
||||
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
|
||||
#define CONFIG_USB_OHCI_NEW
|
||||
#define CONFIG_USB_STORAGE
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT
|
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
|
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
|
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
|
||||
|
||||
/* General Boot Parameter */
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTCOMMAND "run flashboot"
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_PBSIZE \
|
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
|
||||
/*
|
||||
* RAM Memory address where to put the
|
||||
* Linux Kernel befor starting.
|
||||
*/
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x22000000
|
||||
|
||||
/*
|
||||
* The NAND Flash partitions:
|
||||
* ==========================================
|
||||
* 0x0000000-0x001ffff -> 128k, bootstrap
|
||||
* 0x0020000-0x005ffff -> 256k, u-boot
|
||||
* 0x0060000-0x007ffff -> 128k, env1
|
||||
* 0x0080000-0x009ffff -> 128k, env2 (backup)
|
||||
* 0x0100000-0x06fffff -> 6M, kernel
|
||||
* 0x0700000-0x8000000 -> 121M, RootFS
|
||||
*/
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
#define CONFIG_ENV_OFFSET ((128 + 256) << 10)
|
||||
#define CONFIG_ENV_OFFSET_REDUND ((128 + 256 + 128) << 10)
|
||||
#define CONFIG_ENV_SIZE (128 << 10)
|
||||
|
||||
/*
|
||||
* Predefined environment variables.
|
||||
* Usefull to define some easy to use boot commands.
|
||||
*/
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
\
|
||||
"basicargs=console=ttyS0,115200\0" \
|
||||
\
|
||||
"mtdparts=mtdparts=atmel_nand:128k(bootstrap)ro," \
|
||||
"256k(uboot)ro,128k(env1)ro," \
|
||||
"128k(env2)ro,6M(linux),-(root)rw\0" \
|
||||
\
|
||||
"flashboot=setenv bootargs ${basicargs} ${mtdparts} " \
|
||||
"root=/dev/mtdblock5 rootfstype=jffs2; " \
|
||||
"nand read 0x22000000 0x100000 0x600000; " \
|
||||
"bootm 22000000\0" \
|
||||
\
|
||||
"sdboot=setenv bootargs ${basicargs} ${mtdparts} " \
|
||||
"root=/dev/mmcblk0p1 rootwait; " \
|
||||
"nand read 0x22000000 0x100000 0x600000; " \
|
||||
"bootm 22000000"
|
||||
|
||||
/* Command line & features configuration */
|
||||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_LED
|
||||
|
||||
#ifdef CONFIG_MACB
|
||||
# define CONFIG_CMD_PING
|
||||
# define CONFIG_CMD_DHCP
|
||||
#endif /* CONFIG_MACB */
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue
Block a user