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powerpc/usb:Differentiate USB controller base address
Introduce different macros for storing addresses of multiple USB controllers. This is required for successful initialization and usage of multiple USB controllers inside u-boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
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@ -315,7 +315,7 @@ void cpu_init_f (volatile immap_t * im)
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#endif
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#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_MPC831x)
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uint32_t temp;
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struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
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struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
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/* Configure interface. */
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setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
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@ -1255,9 +1255,9 @@ static inline u32 get_pata_base (void)
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}
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#endif /* __ASSEMBLY__ */
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#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000
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#define CONFIG_SYS_MPC512x_USB_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
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#define CONFIG_SYS_MPC512x_USB1_OFFSET 0x4000
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#define CONFIG_SYS_MPC512x_USB1_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB1_OFFSET)
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#define IIM_BASE_ADDR (CONFIG_SYS_IMMR + offsetof(immap_t, iim))
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@ -764,9 +764,11 @@ typedef struct immap {
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} immap_t;
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#ifdef CONFIG_HAS_FSL_MPH_USB
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#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x22000 /* use the MPH controller */
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#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 /* use the MPH controller */
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#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0
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#else
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#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000 /* use the DR controller */
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#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0
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#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0x23000 /* use the DR controller */
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#endif
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#elif defined(CONFIG_MPC8313)
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@ -1031,11 +1033,15 @@ typedef struct immap {
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#define CONFIG_SYS_MPC83xx_ESDHC_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET)
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#ifndef CONFIG_SYS_MPC83xx_USB_OFFSET
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#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000
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#ifndef CONFIG_SYS_MPC83xx_USB1_OFFSET
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#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x23000
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#endif
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#define CONFIG_SYS_MPC83xx_USB1_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB1_OFFSET)
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#if defined(CONFIG_MPC834x)
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#define CONFIG_SYS_MPC83xx_USB2_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB2_OFFSET)
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#endif
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#define CONFIG_SYS_MPC83xx_USB_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
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#define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)
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#define CONFIG_SYS_TSEC1_OFFSET 0x24000
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@ -2932,7 +2932,6 @@ struct ccsr_pman {
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#endif
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#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x210000
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#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x211000
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#define CONFIG_SYS_MPC85xx_USB_OFFSET CONFIG_SYS_MPC85xx_USB1_OFFSET
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#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0x214000
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#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0x214100
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#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x220000
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@ -2985,7 +2984,7 @@ struct ccsr_pman {
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#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x1e000
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#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000
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#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
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#define CONFIG_SYS_MPC85xx_USB_OFFSET 0x22000
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#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
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#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
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#ifdef CONFIG_TSECV2
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#define CONFIG_SYS_TSEC1_OFFSET 0xB0000
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@ -3086,8 +3085,10 @@ struct ccsr_pman {
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
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#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB1_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB2_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB2_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR \
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@ -38,7 +38,7 @@ static int usb_phy_clk_valid(struct usb_ehci *ehci)
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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struct usb_ehci *ehci;
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struct usb_ehci *ehci = NULL;
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const char *phy_type = NULL;
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size_t len;
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#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
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@ -47,7 +47,18 @@ int ehci_hcd_init(int index, enum usb_init_type init,
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usb_phy[0] = '\0';
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#endif
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
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switch (index) {
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case 0:
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
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break;
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case 1:
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR;
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break;
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default:
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printf("ERROR: wrong controller index!!\n");
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break;
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};
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*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
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HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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@ -38,7 +38,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
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volatile struct usb_ehci *ehci;
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/* Hook the memory mapped registers for EHCI-Controller */
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
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*hccr = (struct ehci_hccr *)((uint32_t)&(ehci->caplength));
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
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HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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@ -82,7 +82,7 @@ int ehci_hcd_stop(int index)
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int exit_status = 0;
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/* Reset the USB controller */
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
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exit_status = reset_usb_controller(ehci);
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return exit_status;
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@ -149,11 +149,18 @@
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#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
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#if defined(CONFIG_MPC83xx)
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#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
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#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR
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#if defined(CONFIG_MPC834x)
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#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR
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#else
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#define CONFIG_SYS_FSL_USB2_ADDR 0
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#endif
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#elif defined(CONFIG_MPC85xx)
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#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
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#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
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#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
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#elif defined(CONFIG_MPC512X)
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#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
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#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
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#define CONFIG_SYS_FSL_USB2_ADDR 0
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#endif
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/*
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