mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-27 22:56:49 +08:00
mips: mtmips: add two reference boards for mt7620
The mt7620_rfb board supports integrated 10/100M PHYs plus two external giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB. The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a 16MB SPI-NOR flash. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This commit is contained in:
Weijie Gao
Daniel Schwierzeck
parent
dd4fdc0b14
commit
76880b08c4
@ -14,6 +14,8 @@ dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
|
||||
dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
|
||||
dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
|
||||
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
|
||||
dtb-$(CONFIG_BOARD_MT7620_RFB) += mediatek,mt7620-rfb.dtb
|
||||
dtb-$(CONFIG_BOARD_MT7620_MT7530_RFB) += mediatek,mt7620-mt7530-rfb.dtb
|
||||
dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
|
||||
dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb
|
||||
dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb
|
||||
|
||||
100
arch/mips/dts/mediatek,mt7620-mt7530-rfb.dts
Normal file
100
arch/mips/dts/mediatek,mt7620-mt7530-rfb.dts
Normal file
@ -0,0 +1,100 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2020 MediaTek Inc.
|
||||
*
|
||||
* Author: Weijie Gao <weijie.gao@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "mt7620.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7620-mt7530-rfb", "mediatek,mt7620-soc";
|
||||
model = "MediaTek MT7620-MT7530 RFB (MTKC712)";
|
||||
|
||||
aliases {
|
||||
serial0 = &uartlite;
|
||||
spi0 = &spi0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uartlite;
|
||||
};
|
||||
};
|
||||
|
||||
&uartlite {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
state_default: pin_state {
|
||||
pleds {
|
||||
groups = "ephy led", "wled";
|
||||
function = "led";
|
||||
};
|
||||
|
||||
gpios {
|
||||
groups = "pa", "uartf";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
gsw_pins: gsw_pins {
|
||||
mdio {
|
||||
groups = "mdio";
|
||||
function = "mdio";
|
||||
};
|
||||
|
||||
rgmii1 {
|
||||
groups = "rgmii1";
|
||||
function = "rgmii1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
num-cs = <2>;
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <25000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
pa0_pull_low {
|
||||
gpio-hog;
|
||||
output-low;
|
||||
gpios = <20 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
pa1_pull_low {
|
||||
gpio-hog;
|
||||
output-low;
|
||||
gpios = <21 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gsw_pins>;
|
||||
|
||||
port5 {
|
||||
phy-mode = "rgmii";
|
||||
phy-addr = <5>;
|
||||
fixed-link {
|
||||
full-duplex;
|
||||
speed = <1000>;
|
||||
mediatek,mt7530;
|
||||
mediatek,mt7530-reset = <&gpio0 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
97
arch/mips/dts/mediatek,mt7620-rfb.dts
Normal file
97
arch/mips/dts/mediatek,mt7620-rfb.dts
Normal file
@ -0,0 +1,97 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2020 MediaTek Inc.
|
||||
*
|
||||
* Author: Weijie Gao <weijie.gao@mediatek.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "mt7620.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "mediatek,mt7620-rfb", "mediatek,mt7620-soc";
|
||||
model = "MediaTek MT7620 RFB (WS2120)";
|
||||
|
||||
aliases {
|
||||
serial0 = &uartlite;
|
||||
spi0 = &spi0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uartlite;
|
||||
};
|
||||
};
|
||||
|
||||
&uartlite {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
state_default: pin_state {
|
||||
pleds {
|
||||
groups = "ephy led", "wled";
|
||||
function = "led";
|
||||
};
|
||||
|
||||
gpios {
|
||||
groups = "uartf";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
gsw_pins: gsw_pins {
|
||||
mdio {
|
||||
groups = "mdio";
|
||||
function = "mdio";
|
||||
};
|
||||
|
||||
rgmii1 {
|
||||
groups = "rgmii1";
|
||||
function = "rgmii1";
|
||||
};
|
||||
|
||||
rgmii2 {
|
||||
groups = "rgmii2";
|
||||
function = "rgmii2";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
num-cs = <2>;
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <25000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gsw_pins>;
|
||||
|
||||
port4 {
|
||||
phy-mode = "rgmii";
|
||||
phy-addr = <4>;
|
||||
};
|
||||
|
||||
port5 {
|
||||
phy-mode = "rgmii";
|
||||
phy-addr = <5>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc {
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
@ -7,6 +7,21 @@ config DEBUG_UART_BOARD_INIT
|
||||
choice
|
||||
prompt "Board select"
|
||||
|
||||
config BOARD_MT7620_RFB
|
||||
bool "MediaTek MT7620 RFB"
|
||||
help
|
||||
The reference design of MT7620A (WS2120). The board has 64 MiB DDR2,
|
||||
8 MiB SPI-NOR flash, 1 built-in 6 port switch (two GE PHYs and five
|
||||
FE PHYs,one port can be configured to use either FE PHY or GE PHY),
|
||||
1 UART, 1 USB host, 1 SDXC, 1 PCIe socket and JTAG pins.
|
||||
|
||||
config BOARD_MT7620_MT7530_RFB
|
||||
bool "MediaTek MT7620-MT7530 RFB"
|
||||
help
|
||||
The reference design of MT7620DA (MTKC712). The board has 64 MiB
|
||||
intergrated DDR2 KGD, 16 MiB SPI-NOR flash, an external 5-port giga
|
||||
switch MT7530 and 1 UART.
|
||||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
@ -51,4 +66,6 @@ config CPU_FREQ_MULTI
|
||||
default 6 if CPU_FREQ_600MHZ
|
||||
default 7 if CPU_FREQ_620MHZ
|
||||
|
||||
source "board/mediatek/mt7620/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
12
board/mediatek/mt7620/Kconfig
Normal file
12
board/mediatek/mt7620/Kconfig
Normal file
@ -0,0 +1,12 @@
|
||||
if BOARD_MT7620_RFB || BOARD_MT7620_MT7530_RFB
|
||||
|
||||
config SYS_BOARD
|
||||
default "mt7620"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "mediatek"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "mt7620"
|
||||
|
||||
endif
|
||||
9
board/mediatek/mt7620/MAINTAINERS
Normal file
9
board/mediatek/mt7620/MAINTAINERS
Normal file
@ -0,0 +1,9 @@
|
||||
MT7620_RFB BOARD
|
||||
M: Weijie Gao <weijie.gao@mediatek.com>
|
||||
S: Maintained
|
||||
F: board/mediatek/mt7620
|
||||
F: include/configs/mt7620.h
|
||||
F: configs/mt7620_rfb_defconfig
|
||||
F: configs/mt7620_mt7530_rfb_defconfig
|
||||
F: arch/mips/dts/mediatek,mt7620-rfb.dts
|
||||
F: arch/mips/dts/mediatek,mt7620-mt7530-rfb.dts
|
||||
3
board/mediatek/mt7620/Makefile
Normal file
3
board/mediatek/mt7620/Makefile
Normal file
@ -0,0 +1,3 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
obj-y += board.o
|
||||
6
board/mediatek/mt7620/board.c
Normal file
6
board/mediatek/mt7620/board.c
Normal file
@ -0,0 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
|
||||
*
|
||||
* Author: Weijie Gao <weijie.gao@mediatek.com>
|
||||
*/
|
||||
58
configs/mt7620_mt7530_rfb_defconfig
Normal file
58
configs/mt7620_mt7530_rfb_defconfig
Normal file
@ -0,0 +1,58 @@
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_ENV_SIZE=0x1000
|
||||
CONFIG_ENV_OFFSET=0x30000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_DEBUG_UART_BASE=0xb0000c00
|
||||
CONFIG_DEBUG_UART_CLOCK=40000000
|
||||
CONFIG_ARCH_MTMIPS=y
|
||||
CONFIG_BOARD_MT7620_MT7530_RFB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb"
|
||||
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
|
||||
CONFIG_MIPS_BOOT_FDT=y
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_NOR_SUPPORT=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_DM is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_SPI=y
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_MII=y
|
||||
# CONFIG_CMD_MDIO is not set
|
||||
# CONFIG_PARTITIONS is not set
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupts resets reset-names"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SPL_DM=y
|
||||
# CONFIG_SIMPLE_BUS is not set
|
||||
# CONFIG_SPL_SIMPLE_BUS is not set
|
||||
CONFIG_GPIO_HOG=y
|
||||
# CONFIG_INPUT is not set
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_ISSI=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_MT7620_ETH=y
|
||||
CONFIG_SPECIFY_CONSOLE_INDEX=y
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MT7620_SPI=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_SPL_LZMA=y
|
||||
76
configs/mt7620_rfb_defconfig
Normal file
76
configs/mt7620_rfb_defconfig
Normal file
@ -0,0 +1,76 @@
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_ENV_SIZE=0x1000
|
||||
CONFIG_ENV_OFFSET=0x30000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_DEBUG_UART_BASE=0xb0000c00
|
||||
CONFIG_DEBUG_UART_CLOCK=40000000
|
||||
CONFIG_ARCH_MTMIPS=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb"
|
||||
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
|
||||
CONFIG_MIPS_BOOT_FDT=y
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_NOR_SUPPORT=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_DM is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_MII=y
|
||||
# CONFIG_CMD_MDIO is not set
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_EFI_PARTITION=y
|
||||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupts resets reset-names"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SPL_DM=y
|
||||
# CONFIG_SIMPLE_BUS is not set
|
||||
# CONFIG_SPL_SIMPLE_BUS is not set
|
||||
# CONFIG_SPL_BLK is not set
|
||||
CONFIG_GPIO_HOG=y
|
||||
# CONFIG_INPUT is not set
|
||||
CONFIG_MMC=y
|
||||
CONFIG_DM_MMC=y
|
||||
# CONFIG_MMC_QUIRKS is not set
|
||||
# CONFIG_MMC_HW_PARTITIONING is not set
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_ISSI=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_MT7620_ETH=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_MT7620_USB_PHY=y
|
||||
CONFIG_SPECIFY_CONSOLE_INDEX=y
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MT7620_SPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_SPL_LZMA=y
|
||||
Loading…
Reference in New Issue
Block a user