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apalis_imx6: migrate mmc and sata to using driver model
Migrate MMC and SATA to using driver model. While at it also enable SCSI driver model. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Marcel Ziswiler
Stefano Babic
parent
e17f37194d
commit
72b49e2c1e
@ -9,6 +9,7 @@
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#include <common.h>
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#include <dm.h>
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#include <ahci.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/imx-regs.h>
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@ -22,7 +23,9 @@
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/sata.h>
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#include <asm/mach-imx/video.h>
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#include <dm/device-internal.h>
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#include <dm/platform_data/serial_mxc.h>
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#include <dwc_ahsata.h>
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#include <environment.h>
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#include <fsl_esdhc.h>
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#include <imx_thermal.h>
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@ -60,6 +63,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST)
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#define APALIS_IMX6_SATA_INIT_RETRIES 10
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int dram_init(void)
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{
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/* use the DDR controllers configured size */
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@ -79,6 +84,7 @@ iomux_v3_cfg_t const uart1_pads_dte[] = {
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MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD)
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/* Apalis MMC1 */
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iomux_v3_cfg_t const usdhc1_pads[] = {
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MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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@ -121,6 +127,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
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MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION,
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};
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#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */
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int mx6_rgmii_rework(struct phy_device *phydev)
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{
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@ -288,7 +295,7 @@ int board_ehci_power(int port, int on)
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}
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#endif
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#ifdef CONFIG_FSL_ESDHC
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#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD)
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/* use the following sequence: eMMC, MMC1, SD1 */
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struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = {
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{USDHC3_BASE_ADDR},
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@ -319,43 +326,6 @@ int board_mmc_getcd(struct mmc *mmc)
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int board_mmc_init(bd_t *bis)
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{
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#ifndef CONFIG_SPL_BUILD
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s32 status = 0;
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u32 index = 0;
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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usdhc_cfg[0].max_bus_width = 8;
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usdhc_cfg[1].max_bus_width = 8;
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usdhc_cfg[2].max_bus_width = 4;
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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switch (index) {
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case 0:
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imx_iomux_v3_setup_multiple_pads(
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usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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break;
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case 1:
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imx_iomux_v3_setup_multiple_pads(
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usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
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break;
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case 2:
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imx_iomux_v3_setup_multiple_pads(
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usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
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break;
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default:
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printf("Warning: you configured more USDHC controllers (%d) then supported by the board (%d)\n",
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index + 1, CONFIG_SYS_FSL_USDHC_NUM);
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return status;
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}
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status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
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}
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return status;
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#else /* CONFIG_SPL_BUILD */
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned reg = readl(&psrc->sbmr1) >> 11;
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/*
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@ -394,9 +364,8 @@ int board_mmc_init(bd_t *bis)
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}
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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#endif /* CONFIG_SPL_BUILD */
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}
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#endif /* CONFIG_FSL_ESDHC */
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#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */
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int board_phy_config(struct phy_device *phydev)
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{
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@ -1171,3 +1140,52 @@ U_BOOT_DEVICE(mxc_serial) = {
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.name = "serial_mxc",
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.platdata = &mxc_serial_plat,
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};
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#if CONFIG_IS_ENABLED(AHCI)
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static int sata_imx_probe(struct udevice *dev)
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{
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int i, err;
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for (i = 0; i < APALIS_IMX6_SATA_INIT_RETRIES; i++) {
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err = setup_sata();
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if (err) {
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printf("SATA setup failed: %d\n", err);
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return err;
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}
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udelay(100);
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err = dwc_ahsata_probe(dev);
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if (!err)
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break;
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/* There is no device on the SATA port */
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if (sata_dm_port_status(0, 0) == 0)
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break;
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/* There's a device, but link not established. Retry */
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device_remove(dev, DM_REMOVE_NORMAL);
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}
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return 0;
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}
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struct ahci_ops sata_imx_ops = {
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.port_status = dwc_ahsata_port_status,
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.reset = dwc_ahsata_bus_reset,
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.scan = dwc_ahsata_scan,
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};
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static const struct udevice_id sata_imx_ids[] = {
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{ .compatible = "fsl,imx6q-ahci" },
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{ }
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};
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U_BOOT_DRIVER(sata_imx) = {
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.name = "dwc_ahci",
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.id = UCLASS_AHCI,
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.of_match = sata_imx_ids,
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.ops = &sata_imx_ops,
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.probe = sata_imx_probe,
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};
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#endif /* AHCI */
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@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_CMD_HDMIDETECT=y
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_FIT=y
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@ -55,6 +56,7 @@ CONFIG_DWC_AHSATA=y
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CONFIG_DFU_MMC=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_DM_MMC=y
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CONFIG_FSL_ESDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_MICREL=y
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@ -67,6 +69,7 @@ CONFIG_DM_PMIC_PFUZE100=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_PFUZE100=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_SCSI=y
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CONFIG_IMX_THERMAL=y
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CONFIG_USB=y
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CONFIG_USB_KEYBOARD=y
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@ -57,9 +57,6 @@
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* SATA Configs
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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#define CONFIG_LBA48
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#endif
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