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MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG

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This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
This commit is contained in:
Daniel Schwierzeck 2011-07-27 13:22:37 +02:00 committed by Shinya Kuribayashi
parent 60b74bde92
commit 7185adb48e
2 changed files with 11 additions and 4 deletions
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13
arch/mips/cpu/mips32/start.S
View File

@ -64,9 +64,16 @@
_start:
RVECENT(reset,0) # U-boot entry point
RVECENT(reset,1) # software reboot
#ifdef CONFIG_INCA_IP
.word INFINEON_EBU_BOOTCFG # EBU init code, fetched during
.word 0x00000000 # booting phase of the flash
#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
/*
* Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
* access external NOR flashes. If the board boots from NOR flash the
* internal BootROM does a blind read at address 0xB0000010 to read the
* initial configuration for that EBU in order to access the flash
* device with correct parameters. This config option is board-specific.
*/
.word CONFIG_SYS_XWAY_EBU_BOOTCFG
.word 0x00000000
#else
RVECENT(romReserved,2)
#endif

2
include/configs/incaip.h
View File

@ -41,7 +41,7 @@
#define CONFIG_CPU_CLOCK_RATE 150000000
#endif
#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
#define CONFIG_SYS_XWAY_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */