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arm64: zynqmp: Set qspi tx-buswidth to 4

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In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due
to this the framework only issues 1-1-1 write commands to the GQSPI driver.
But the GQSPI controller is capable of handling 1-4-4 write commands, so
updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable
the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This
will increase the tx data transfer rate, as now the tx data will be
transferred on four lines instead on single line.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
This commit is contained in:
Amit Kumar Mahapatra 2022-05-10 16:33:01 +02:00 committed by Michal Simek
parent 10c29fa1cc
commit 6e38e2ea79
18 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/dts/zynqmp-m-a2197-01-revA.dts
View File

@ -77,7 +77,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>;
};

2
arch/arm/dts/zynqmp-m-a2197-02-revA.dts
View File

@ -73,7 +73,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>;
};

2
arch/arm/dts/zynqmp-m-a2197-03-revA.dts
View File

@ -73,7 +73,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>;
};

2
arch/arm/dts/zynqmp-mini-qspi.dts
View File

@ -68,7 +68,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>;
};

2
arch/arm/dts/zynqmp-sm-k26-revA.dts
View File

@ -117,7 +117,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>; /* 40MHz */
partition@0 {

2
arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
View File

@ -61,7 +61,7 @@
compatible = "st,m25p80", "n25q256a", "jedec,spi-nor";
m25p,fast-read;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <166000000>;
#address-cells = <1>;

2
arch/arm/dts/zynqmp-zc1232-revA.dts
View File

@ -44,7 +44,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zc1254-revA.dts
View File

@ -45,7 +45,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
View File

@ -351,7 +351,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
View File

@ -173,7 +173,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu102-revA.dts
View File

@ -948,7 +948,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu104-revA.dts
View File

@ -434,7 +434,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu104-revC.dts
View File

@ -446,7 +446,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu106-revA.dts
View File

@ -942,7 +942,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu111-revA.dts
View File

@ -784,7 +784,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu1275-revA.dts
View File

@ -50,7 +50,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */

2
arch/arm/dts/zynqmp-zcu208-revA.dts
View File

@ -642,7 +642,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
};

2
arch/arm/dts/zynqmp-zcu216-revA.dts
View File

@ -653,7 +653,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
};