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https://github.com/u-boot/u-boot.git
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cgtqmx6eval: Add splash screen support
Add LVDS and HDMI support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This commit is contained in:
Otavio Salvador
Stefano Babic
parent
95246ac709
commit
6d551f2705
@ -17,11 +17,15 @@
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#include <asm/imx-common/iomux-v3.h>
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#include <asm/imx-common/boot_mode.h>
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#include <asm/imx-common/mxc_i2c.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/crm_regs.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <i2c.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#include <linux/fb.h>
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#include <ipu_pixfmt.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -263,9 +267,178 @@ int board_ehci_power(int port, int on)
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return 0;
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}
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struct display_info_t {
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int bus;
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int addr;
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int pixfmt;
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int (*detect)(struct display_info_t const *dev);
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void (*enable)(struct display_info_t const *dev);
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struct fb_videomode mode;
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};
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static void disable_lvds(struct display_info_t const *dev)
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{
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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clrbits_le32(&iomux->gpr[2], IOMUXC_GPR2_LVDS_CH0_MODE_MASK |
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IOMUXC_GPR2_LVDS_CH1_MODE_MASK);
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}
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static void do_enable_hdmi(struct display_info_t const *dev)
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{
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disable_lvds(dev);
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imx_enable_hdmi_phy();
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}
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static struct display_info_t const displays[] = {
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{
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.bus = -1,
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.addr = 0,
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.pixfmt = IPU_PIX_FMT_RGB666,
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.detect = NULL,
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.enable = NULL,
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.mode = {
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.name =
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"Hannstar-XGA",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 220,
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.right_margin = 40,
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.upper_margin = 21,
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.lower_margin = 7,
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.hsync_len = 60,
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.vsync_len = 10,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED } },
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{
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.bus = -1,
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.addr = 0,
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.pixfmt = IPU_PIX_FMT_RGB24,
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.detect = NULL,
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.enable = do_enable_hdmi,
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.mode = {
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.name = "HDMI",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15385,
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.left_margin = 220,
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.right_margin = 40,
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.upper_margin = 21,
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.lower_margin = 7,
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.hsync_len = 60,
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.vsync_len = 10,
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.sync = FB_SYNC_EXT,
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.vmode = FB_VMODE_NONINTERLACED } }
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};
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int board_video_skip(void)
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{
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int i;
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int ret;
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char const *panel = getenv("panel");
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if (!panel) {
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for (i = 0; i < ARRAY_SIZE(displays); i++) {
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struct display_info_t const *dev = displays + i;
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if (dev->detect && dev->detect(dev)) {
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panel = dev->mode.name;
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printf("auto-detected panel %s\n", panel);
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break;
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}
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}
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if (!panel) {
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panel = displays[0].mode.name;
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printf("No panel detected: default to %s\n", panel);
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i = 0;
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}
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} else {
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for (i = 0; i < ARRAY_SIZE(displays); i++) {
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if (!strcmp(panel, displays[i].mode.name))
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break;
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}
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}
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if (i < ARRAY_SIZE(displays)) {
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ret = ipuv3_fb_init(&displays[i].mode, 0, displays[i].pixfmt);
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if (!ret) {
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if (displays[i].enable)
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displays[i].enable(displays + i);
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printf("Display: %s (%ux%u)\n",
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displays[i].mode.name, displays[i].mode.xres,
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displays[i].mode.yres);
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} else
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printf("LCD %s cannot be configured: %d\n",
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displays[i].mode.name, ret);
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} else {
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printf("unsupported panel %s\n", panel);
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return -EINVAL;
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}
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return 0;
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}
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static void setup_display(void)
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{
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struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
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int reg;
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enable_ipu_clock();
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imx_setup_hdmi();
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/* Turn on LDB0, LDB1, IPU,IPU DI0 clocks */
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setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK |
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MXC_CCM_CCGR3_LDB_DI1_MASK);
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/* set LDB0, LDB1 clk select to 011/011 */
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reg = readl(&mxc_ccm->cs2cdr);
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reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
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MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
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reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
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(3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
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writel(reg, &mxc_ccm->cs2cdr);
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setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV |
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MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV);
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setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 <<
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MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET |
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CHSCCDR_CLK_SEL_LDB_DI0 <<
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MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
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reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
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| IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW
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| IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
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| IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
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| IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
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| IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
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| IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
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| IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED
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| IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0;
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writel(reg, &iomux->gpr[2]);
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reg = readl(&iomux->gpr[3]);
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reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK |
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IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) |
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(IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
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IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET);
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writel(reg, &iomux->gpr[3]);
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}
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/*
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* Do not overwrite the console
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* Use always serial for U-Boot console
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*/
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int overwrite_console(void)
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{
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return 1;
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}
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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setup_display();
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return 0;
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}
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@ -68,6 +68,26 @@
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#define CONFIG_USB_KEYBOARD
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#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
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/* Framebuffer */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#ifdef CONFIG_MX6DL
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#define CONFIG_IPUV3_CLK 198000000
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#else
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#define CONFIG_IPUV3_CLK 264000000
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#endif
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#define CONFIG_IMX_HDMI
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#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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