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drivers: gpio: implement MAX77663 GPIO cell
MAXIM Semiconductor's PMIC, MAX77663 has 8 GPIO pins and 3 GPIO-like pins. It also supports interrupts from these pins. Add GPIO driver for these pins to control via GPIO APIs. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This commit is contained in:
Svyatoslav Ryhel
parent
936d0f9dd7
commit
6b24c372c1
@ -238,6 +238,15 @@ config MAX7320_GPIO
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original maxim device has 8 push/pull outputs,
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some clones offers 16bit.
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config MAX77663_GPIO
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bool "MAX77663 GPIO cell of PMIC driver"
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depends on DM_GPIO && DM_PMIC_MAX77663
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help
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GPIO driver for MAX77663 PMIC from Maxim Semiconductor.
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MAX77663 PMIC has 8 pins that can be configured as GPIOs
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and 3 GPIO-like pins dedicated for power/reset buttons
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and LID sensor.
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config MCP230XX_GPIO
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bool "MCP230XX GPIO driver"
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depends on DM
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@ -68,6 +68,7 @@ obj-$(CONFIG_NX_GPIO) += nx_gpio.o
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obj-$(CONFIG_SIFIVE_GPIO) += sifive-gpio.o
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obj-$(CONFIG_NOMADIK_GPIO) += nmk_gpio.o
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obj-$(CONFIG_MAX7320_GPIO) += max7320_gpio.o
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obj-$(CONFIG_$(SPL_)MAX77663_GPIO) += max77663_gpio.o
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obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
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obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
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obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
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178
drivers/gpio/max77663_gpio.c
Normal file
178
drivers/gpio/max77663_gpio.c
Normal file
@ -0,0 +1,178 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
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*/
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#include <dm.h>
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#include <asm/gpio.h>
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#include <power/max77663.h>
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#include <power/pmic.h>
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#define NUM_ENTRIES 11 /* 8 GPIOs + 3 KEYs */
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#define NUM_GPIOS 8
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#define MAX77663_CNFG1_GPIO 0x36
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#define GPIO_REG_ADDR(offset) (MAX77663_CNFG1_GPIO + (offset))
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#define MAX77663_CNFG_GPIO_DIR_MASK BIT(1)
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#define MAX77663_CNFG_GPIO_DIR_INPUT BIT(1)
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#define MAX77663_CNFG_GPIO_DIR_OUTPUT 0
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#define MAX77663_CNFG_GPIO_INPUT_VAL_MASK BIT(2)
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#define MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK BIT(3)
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#define MAX77663_CNFG_GPIO_OUTPUT_VAL_HIGH BIT(3)
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#define MAX77663_CNFG_GPIO_OUTPUT_VAL_LOW 0
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#define MAX77663_CNFG_IRQ GENMASK(5, 4)
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#define MAX77663_ONOFFSTAT_REG 0x15
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#define EN0 BIT(2) /* KEY 2 */
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#define ACOK BIT(1) /* KEY 1 */
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#define LID BIT(0) /* KEY 0 */
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static int max77663_gpio_direction_input(struct udevice *dev, unsigned int offset)
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{
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int ret;
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if (offset >= NUM_GPIOS)
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return 0;
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ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
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MAX77663_CNFG_GPIO_DIR_MASK,
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MAX77663_CNFG_GPIO_DIR_INPUT);
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if (ret < 0)
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log_debug("%s: CNFG_GPIOx dir update failed: %d\n", __func__, ret);
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return ret;
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}
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static int max77663_gpio_direction_output(struct udevice *dev, unsigned int offset,
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int value)
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{
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u8 val;
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int ret;
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if (offset >= NUM_GPIOS)
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return -EINVAL;
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val = (value) ? MAX77663_CNFG_GPIO_OUTPUT_VAL_HIGH :
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MAX77663_CNFG_GPIO_OUTPUT_VAL_LOW;
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ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
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MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK, val);
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if (ret < 0) {
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log_debug("%s: CNFG_GPIOx val update failed: %d\n", __func__, ret);
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return ret;
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}
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ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
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MAX77663_CNFG_GPIO_DIR_MASK,
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MAX77663_CNFG_GPIO_DIR_OUTPUT);
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if (ret < 0)
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log_debug("%s: CNFG_GPIOx dir update failed: %d\n", __func__, ret);
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return ret;
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}
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static int max77663_gpio_get_value(struct udevice *dev, unsigned int offset)
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{
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int ret;
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if (offset >= NUM_GPIOS) {
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ret = pmic_reg_read(dev->parent, MAX77663_ONOFFSTAT_REG);
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if (ret < 0) {
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log_debug("%s: ONOFFSTAT_REG read failed: %d\n", __func__, ret);
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return ret;
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}
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return !!(ret & BIT(offset - NUM_GPIOS));
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}
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ret = pmic_reg_read(dev->parent, GPIO_REG_ADDR(offset));
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if (ret < 0) {
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log_debug("%s: CNFG_GPIOx read failed: %d\n", __func__, ret);
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return ret;
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}
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if (ret & MAX77663_CNFG_GPIO_DIR_MASK)
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return !!(ret & MAX77663_CNFG_GPIO_INPUT_VAL_MASK);
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else
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return !!(ret & MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK);
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}
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static int max77663_gpio_set_value(struct udevice *dev, unsigned int offset,
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int value)
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{
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u8 val;
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int ret;
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if (offset >= NUM_GPIOS)
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return -EINVAL;
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val = (value) ? MAX77663_CNFG_GPIO_OUTPUT_VAL_HIGH :
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MAX77663_CNFG_GPIO_OUTPUT_VAL_LOW;
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ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
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MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK, val);
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if (ret < 0)
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log_debug("%s: CNFG_GPIO_OUT update failed: %d\n", __func__, ret);
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return ret;
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}
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static int max77663_gpio_get_function(struct udevice *dev, unsigned int offset)
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{
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int ret;
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if (offset >= NUM_GPIOS)
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return GPIOF_INPUT;
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ret = pmic_reg_read(dev->parent, GPIO_REG_ADDR(offset));
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if (ret < 0) {
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log_debug("%s: CNFG_GPIOx read failed: %d\n", __func__, ret);
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return ret;
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}
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if (ret & MAX77663_CNFG_GPIO_DIR_MASK)
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return GPIOF_INPUT;
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else
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return GPIOF_OUTPUT;
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}
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static const struct dm_gpio_ops max77663_gpio_ops = {
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.direction_input = max77663_gpio_direction_input,
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.direction_output = max77663_gpio_direction_output,
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.get_value = max77663_gpio_get_value,
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.set_value = max77663_gpio_set_value,
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.get_function = max77663_gpio_get_function,
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};
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static int max77663_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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int i, ret;
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uc_priv->gpio_count = NUM_ENTRIES;
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uc_priv->bank_name = "GPIO";
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/*
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* GPIO interrupts may be left ON after bootloader, hence let's
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* pre-initialize hardware to the expected state by disabling all
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* the interrupts.
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*/
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for (i = 0; i < NUM_GPIOS; i++) {
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ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(i),
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MAX77663_CNFG_IRQ, 0);
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if (ret < 0) {
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log_debug("%s: failed to disable interrupt: %d\n", __func__, ret);
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return ret;
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}
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}
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return 0;
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}
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U_BOOT_DRIVER(max77663_gpio) = {
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.name = MAX77663_GPIO_DRIVER,
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.id = UCLASS_GPIO,
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.probe = max77663_gpio_probe,
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.ops = &max77663_gpio_ops,
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};
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@ -55,6 +55,15 @@ static int max77663_bind(struct udevice *dev)
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}
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}
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if (IS_ENABLED(CONFIG_MAX77663_GPIO)) {
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ret = device_bind_driver(dev, MAX77663_GPIO_DRIVER,
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"gpio", NULL);
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if (ret) {
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log_err("cannot bind GPIOs (ret = %d)\n", ret);
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return ret;
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}
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}
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regulators_node = dev_read_subnode(dev, "regulators");
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if (!ofnode_valid(regulators_node)) {
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log_err("%s regulators subnode not found!\n", dev->name);
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18
include/dt-bindings/pmic/max77663.h
Normal file
18
include/dt-bindings/pmic/max77663.h
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@ -0,0 +1,18 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
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*/
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#ifndef _DT_BINDINGS_MAX77663_H_
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#define _DT_BINDINGS_MAX77663_H_
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/*
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* MAX77663 has 8 GPIO (0 to 7) and 3 KEYS
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* KEYS are appended after GPIOs
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*/
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#define EN0 10
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#define ACOK 9
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#define LID 8
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#endif
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@ -13,6 +13,7 @@
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#define MAX77663_LDO_DRIVER "max77663_ldo"
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#define MAX77663_SD_DRIVER "max77663_sd"
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#define MAX77663_RST_DRIVER "max77663_rst"
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#define MAX77663_GPIO_DRIVER "max77663_gpio"
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/* Step-Down (SD) Regulator calculations */
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#define SD_STATUS_MASK 0x30
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