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imx: imx31_phycore.h: fix checkpatch warnings
Cleanup board config file and fix issues reported by checkpatch.pl script. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
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@ -30,25 +30,18 @@
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#include <asm/arch/imx-regs.h>
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/* High Level Configuration Options */
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#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
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#define CONFIG_MX31 1 /* in a mx31 */
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/* High Level Configuration Options */
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#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
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#define CONFIG_MX31 /* in a mx31 */
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#define CONFIG_MX31_HCLK_FREQ 26000000
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#define CONFIG_MX31_CLK32 32000
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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/* Temporarily disabled */
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#if 0
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#define CONFIG_OF_LIBFDT 1
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#define CONFIG_FIT 1
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#define CONFIG_FIT_VERBOSE 1
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#endif
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Size of malloc() pool
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@ -59,14 +52,14 @@
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* Hardware drivers
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*/
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#define CONFIG_HARD_I2C 1
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#define CONFIG_I2C_MXC 1
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#define CONFIG_SYS_I2C_MX31_PORT2 1
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#define CONFIG_HARD_I2C
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#define CONFIG_I2C_MXC
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#define CONFIG_SYS_I2C_MX31_PORT2
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 0xfe
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#define CONFIG_MXC_UART 1
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#define CONFIG_SYS_MX31_UART1 1
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#define CONFIG_MXC_UART
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#define CONFIG_SYS_MX31_UART1
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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@ -86,7 +79,8 @@
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#define CONFIG_BOOTDELAY 3
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#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
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#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \
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"1536k(kernel),-(root)"
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 192.168.23.168
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@ -94,34 +88,51 @@
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
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"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
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"bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock2 rootfstype=jffs2" \
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"bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)" \
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"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
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"ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
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"bootargs_flash=setenv bootargs $(bootargs) " \
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"root=/dev/mtdblock2 rootfstype=jffs2\0" \
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"bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
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"bootcmd=run bootcmd_net\0" \
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"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 $(uimage); bootm\0" \
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"bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x80000000\0" \
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"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \
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"tftpboot 0x80000000 $(uimage);bootm\0" \
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"bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \
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"bootm 0x80000000\0" \
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"unlock=yes\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"prg_uboot=tftpboot 0x80000000 $(uboot); protect off 0xa0000000 +0x20000; erase 0xa0000000 +0x20000; cp.b 0x80000000 0xa0000000 $(filesize)\0" \
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"prg_kernel=tftpboot 0x80000000 $(uimage); erase 0xa0040000 +0x180000; cp.b 0x80000000 0xa0040000 $(filesize)\0" \
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"prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
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"videomode=video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:1241513985,vmode:0\0"
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"prg_uboot=tftpboot 0x80000000 $(uboot);" \
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"protect off 0xa0000000 +0x20000;" \
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"erase 0xa0000000 +0x20000;" \
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"cp.b 0x80000000 0xa0000000 $(filesize)\0" \
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"prg_kernel=tftpboot 0x80000000 $(uimage);" \
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"erase 0xa0040000 +0x180000;" \
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"cp.b 0x80000000 0xa0040000 $(filesize)\0" \
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"prg_jffs2=tftpboot 0x80000000 $(jffs2);" \
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"erase 0xa01c0000 0xa1ffffff;" \
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"cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
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"videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \
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"pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \
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"sync:1241513985,vmode:0\0"
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#define CONFIG_SMC911X 1
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_BASE 0xa8000000
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#define CONFIG_SMC911X_32_BIT 1
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#define CONFIG_SMC911X_32_BIT
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "uboot> "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* max number of command args */
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#define CONFIG_SYS_MAXARGS 16
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x10000
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@ -130,16 +141,16 @@
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_CMDLINE_EDITING
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/*-----------------------------------------------------------------------
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/*
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
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/*-----------------------------------------------------------------------
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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@ -156,33 +167,37 @@
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_GBL_DATA_OFFSET)
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/*-----------------------------------------------------------------------
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/*
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_FLASH_BASE 0xa0000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max number of sectors on one chip */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */
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/* Monitor at beginning of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_ENV_IS_IN_EEPROM 1
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#define CONFIG_ENV_OFFSET 0x00 /* environment starts here */
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#define CONFIG_ENV_IS_IN_EEPROM
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#define CONFIG_ENV_OFFSET 0x00 /* env. starts here */
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#define CONFIG_ENV_SIZE 4096
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* between stop and start */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* length of byte address */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */
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/*-----------------------------------------------------------------------
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/*
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* CFI FLASH driver setup
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*/
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#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
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#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
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#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
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#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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/*
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* Timeout for Flash Erase and Flash Write
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* timeout values are in ticks
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*/
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#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ)
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/*
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* JFFS2 partitions
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@ -196,11 +211,11 @@
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#define CONFIG_MXC_GPIO
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#define CONFIG_HARD_SPI 1
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#define CONFIG_MXC_SPI 1
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#define CONFIG_HARD_SPI
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#define CONFIG_MXC_SPI
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#define CONFIG_CMD_SPI
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#define CONFIG_S6E63D6 1
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#define CONFIG_S6E63D6
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#define CONFIG_VIDEO
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#define CONFIG_CFB_CONSOLE
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