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Fix endianness conversions in rtl8169 driver
It is unclear on what platforms this driver has been tested, since noone up to now defines CONFIG_RTL8169 in the board configuration header. Now it has been fixed for a big-endian mpc8241 based linkstation platform. This patch presents the necessary endianness conversion fixes. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This commit is contained in:
Guennadi Liakhovetski
Wolfgang Denk
parent
07eb02687f
commit
6a5e1d75bf
@ -48,7 +48,10 @@
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*
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* Indent Options: indent -kr -i8
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***************************************************************************/
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/*
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* 26 August 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
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* Modified to use le32_to_cpu and cpu_to_le32 properly
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*/
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#include <common.h>
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#include <malloc.h>
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#include <net.h>
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@ -68,12 +71,7 @@
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static u32 ioaddr;
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/* Condensed operations for readability. */
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#define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
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#define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
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#define currticks() get_timer(0)
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#define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)dev->priv, a)
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#define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
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/* media options */
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#define MAX_UNITS 8
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@ -102,7 +100,7 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
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#define RTL_MIN_IO_SIZE 0x80
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#define TX_TIMEOUT (6*HZ)
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/* write/read MMIO register */
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/* write/read MMIO register. Notice: {read,write}[wl] do the necessary swapping */
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#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
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#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
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#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
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@ -218,7 +216,7 @@ enum RTL8169_register_content {
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PHY_Enable_Auto_Nego = 0x1000,
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/* PHY_STAT_REG = 1; */
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PHY_Auto_Neco_Comp = 0x0020,
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PHY_Auto_Nego_Comp = 0x0020,
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/* PHY_AUTO_NEGO_REG = 4; */
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PHY_Cap_10_Half = 0x0020,
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@ -413,23 +411,23 @@ static int rtl_recv(struct eth_device *dev)
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ioaddr = dev->iobase;
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cur_rx = tpc->cur_rx;
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if ((tpc->RxDescArray[cur_rx].status & OWNbit) == 0) {
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if (!(tpc->RxDescArray[cur_rx].status & RxRES)) {
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if ((le32_to_cpu(tpc->RxDescArray[cur_rx].status) & OWNbit) == 0) {
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if (!(le32_to_cpu(tpc->RxDescArray[cur_rx].status) & RxRES)) {
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unsigned char rxdata[RX_BUF_LEN];
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length = (int) (tpc->RxDescArray[cur_rx].
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status & 0x00001FFF) - 4;
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length = (int) (le32_to_cpu(tpc->RxDescArray[cur_rx].
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status) & 0x00001FFF) - 4;
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memcpy(rxdata, tpc->RxBufferRing[cur_rx], length);
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NetReceive(rxdata, length);
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if (cur_rx == NUM_RX_DESC - 1)
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tpc->RxDescArray[cur_rx].status =
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(OWNbit | EORbit) + RX_BUF_SIZE;
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cpu_to_le32((OWNbit | EORbit) + RX_BUF_SIZE);
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else
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tpc->RxDescArray[cur_rx].status =
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OWNbit + RX_BUF_SIZE;
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cpu_to_le32(OWNbit + RX_BUF_SIZE);
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tpc->RxDescArray[cur_rx].buf_addr =
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virt_to_bus(tpc->RxBufferRing[cur_rx]);
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cpu_to_le32(tpc->RxBufferRing[cur_rx]);
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} else {
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puts("Error Rx");
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}
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@ -454,6 +452,7 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
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u8 *ptxb;
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int entry = tpc->cur_tx % NUM_TX_DESC;
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u32 len = length;
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int ret;
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#ifdef DEBUG_RTL8169_TX
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int stime = currticks();
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@ -470,34 +469,38 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
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while (len < ETH_ZLEN)
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ptxb[len++] = '\0';
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tpc->TxDescArray[entry].buf_addr = virt_to_bus(ptxb);
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tpc->TxDescArray[entry].buf_addr = cpu_to_le32(ptxb);
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if (entry != (NUM_TX_DESC - 1)) {
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tpc->TxDescArray[entry].status =
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(OWNbit | FSbit | LSbit) | ((len > ETH_ZLEN) ?
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len : ETH_ZLEN);
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cpu_to_le32((OWNbit | FSbit | LSbit) |
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((len > ETH_ZLEN) ? len : ETH_ZLEN));
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} else {
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tpc->TxDescArray[entry].status =
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(OWNbit | EORbit | FSbit | LSbit) |
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((len > ETH_ZLEN) ? length : ETH_ZLEN);
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cpu_to_le32((OWNbit | EORbit | FSbit | LSbit) |
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((len > ETH_ZLEN) ? len : ETH_ZLEN));
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}
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RTL_W8(TxPoll, 0x40); /* set polling bit */
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tpc->cur_tx++;
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to = currticks() + TX_TIMEOUT;
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while ((tpc->TxDescArray[entry].status & OWNbit) && (currticks() < to)); /* wait */
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while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit)
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&& (currticks() < to)); /* wait */
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if (currticks() >= to) {
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#ifdef DEBUG_RTL8169_TX
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puts ("tx timeout/error\n");
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printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime);
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#endif
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return 0;
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ret = 0;
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} else {
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#ifdef DEBUG_RTL8169_TX
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puts("tx done\n");
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#endif
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return length;
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ret = length;
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}
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/* Delay to make net console (nc) work properly */
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udelay(20);
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return ret;
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}
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static void rtl8169_set_rx_mode(struct eth_device *dev)
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@ -564,8 +567,8 @@ static void rtl8169_hw_start(struct eth_device *dev)
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tpc->cur_rx = 0;
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RTL_W32(TxDescStartAddr, virt_to_le32desc(tpc->TxDescArray));
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RTL_W32(RxDescStartAddr, virt_to_le32desc(tpc->RxDescArray));
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RTL_W32(TxDescStartAddr, tpc->TxDescArray);
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RTL_W32(RxDescStartAddr, tpc->RxDescArray);
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RTL_W8(Cfg9346, Cfg9346_Lock);
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udelay(10);
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@ -603,13 +606,14 @@ static void rtl8169_init_ring(struct eth_device *dev)
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for (i = 0; i < NUM_RX_DESC; i++) {
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if (i == (NUM_RX_DESC - 1))
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tpc->RxDescArray[i].status =
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(OWNbit | EORbit) + RX_BUF_SIZE;
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cpu_to_le32((OWNbit | EORbit) + RX_BUF_SIZE);
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else
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tpc->RxDescArray[i].status = OWNbit + RX_BUF_SIZE;
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tpc->RxDescArray[i].status =
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cpu_to_le32(OWNbit + RX_BUF_SIZE);
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tpc->RxBufferRing[i] = &rxb[i * RX_BUF_SIZE];
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tpc->RxDescArray[i].buf_addr =
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virt_to_bus(tpc->RxBufferRing[i]);
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cpu_to_le32(tpc->RxBufferRing[i]);
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}
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#ifdef DEBUG_RTL8169
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@ -623,8 +627,6 @@ RESET - Finish setting up the ethernet interface
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static void rtl_reset(struct eth_device *dev, bd_t *bis)
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{
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int i;
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u8 diff;
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u32 TxPhyAddr, RxPhyAddr;
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#ifdef DEBUG_RTL8169
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int stime = currticks();
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@ -632,25 +634,14 @@ static void rtl_reset(struct eth_device *dev, bd_t *bis)
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#endif
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tpc->TxDescArrays = tx_ring;
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if (tpc->TxDescArrays == 0)
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puts("Allot Error");
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/* Tx Desscriptor needs 256 bytes alignment; */
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TxPhyAddr = virt_to_bus(tpc->TxDescArrays);
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diff = 256 - (TxPhyAddr - ((TxPhyAddr >> 8) << 8));
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TxPhyAddr += diff;
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tpc->TxDescArray = (struct TxDesc *) (tpc->TxDescArrays + diff);
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tpc->TxDescArray = (struct TxDesc *) ((unsigned long)(tpc->TxDescArrays +
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255) & ~255);
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tpc->RxDescArrays = rx_ring;
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/* Rx Desscriptor needs 256 bytes alignment; */
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RxPhyAddr = virt_to_bus(tpc->RxDescArrays);
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diff = 256 - (RxPhyAddr - ((RxPhyAddr >> 8) << 8));
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RxPhyAddr += diff;
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tpc->RxDescArray = (struct RxDesc *) (tpc->RxDescArrays + diff);
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if (tpc->TxDescArrays == NULL || tpc->RxDescArrays == NULL) {
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puts("Allocate RxDescArray or TxDescArray failed\n");
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return;
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}
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tpc->RxDescArray = (struct RxDesc *) ((unsigned long)(tpc->RxDescArrays +
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255) & ~255);
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rtl8169_init_ring(dev);
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rtl8169_hw_start(dev);
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@ -733,7 +724,7 @@ static int rtl_init(struct eth_device *dev, bd_t *bis)
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/* Get MAC address. FIXME: read EEPROM */
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for (i = 0; i < MAC_ADDR_LEN; i++)
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dev->enetaddr[i] = RTL_R8(MAC0 + i);
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bis->bi_enetaddr[i] = dev->enetaddr[i] = RTL_R8(MAC0 + i);
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#ifdef DEBUG_RTL8169
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printf("MAC Address");
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@ -808,7 +799,7 @@ static int rtl_init(struct eth_device *dev, bd_t *bis)
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/* wait for auto-negotiation process */
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for (i = 10000; i > 0; i--) {
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/* check if auto-negotiation complete */
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if (mdio_read(PHY_STAT_REG) & PHY_Auto_Neco_Comp) {
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if (mdio_read(PHY_STAT_REG) & PHY_Auto_Nego_Comp) {
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udelay(100);
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option = RTL_R8(PHYstatus);
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if (option & _1000bpsF) {
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@ -818,13 +809,12 @@ static int rtl_init(struct eth_device *dev, bd_t *bis)
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#endif
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} else {
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#ifdef DEBUG_RTL8169
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printf
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("%s: %sMbps %s-duplex operation.\n",
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dev->name,
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(option & _100bps) ? "100" :
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"10",
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(option & FullDup) ? "Full" :
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"Half");
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printf("%s: %sMbps %s-duplex operation.\n",
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dev->name,
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(option & _100bps) ? "100" :
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"10",
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(option & FullDup) ? "Full" :
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"Half");
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#endif
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}
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break;
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@ -869,7 +859,7 @@ int rtl8169_initialize(bd_t *bis)
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sprintf (dev->name, "RTL8169#%d", card_number);
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dev->priv = (void *) devno;
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dev->iobase = (int)bus_to_phys(iobase);
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dev->iobase = (int)pci_mem_to_phys(devno, iobase);
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dev->init = rtl_reset;
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dev->halt = rtl_halt;
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