mirror of
https://github.com/u-boot/u-boot.git
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ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC carrier board. The SoM contains the following peripherals: - STPMIC (power delivery) - 512MB DDR3L memory - eMMC and SDIO WiFi module The DHSBC carrier board contains the following peripherals: - Two RGMII Ethernet ports - USB-A Host port, USB-C peripheral port, USB-C power supply plug - Expansion connector Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut
Patrice Chotard
parent
c52e59ec68
commit
69374aa86a
@ -1134,6 +1134,7 @@ dtb-$(CONFIG_ASPEED_AST2600) += \
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dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
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dtb-$(CONFIG_STM32MP13X) += \
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stm32mp135f-dhcor-dhsbc.dtb \
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stm32mp135f-dk.dtb
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dtb-$(CONFIG_STM32MP15X) += \
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25
arch/arm/dts/stm32mp135f-dhcor-dhsbc-u-boot.dtsi
Normal file
25
arch/arm/dts/stm32mp135f-dhcor-dhsbc-u-boot.dtsi
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@ -0,0 +1,25 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2024 Marek Vasut <marex@denx.de>
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*/
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#include "stm32mp13xx-dhcor-u-boot.dtsi"
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&uart4 {
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bootph-all;
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};
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&uart4_pins_b {
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bootph-all;
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pins1 {
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bootph-all;
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};
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pins2 {
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bootph-all;
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};
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};
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&usbphyc {
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bootph-all;
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};
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383
arch/arm/dts/stm32mp135f-dhcor-dhsbc.dts
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383
arch/arm/dts/stm32mp135f-dhcor-dhsbc.dts
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@ -0,0 +1,383 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2024 Marek Vasut <marex@denx.de>
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*
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* DHCOR STM32MP13 variant:
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* DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG
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* DHCOR PCB number: 718-100 or newer
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* DHSBC PCB number: 719-100 or newer
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*/
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/dts-v1/;
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#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
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#include "stm32mp135.dtsi"
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#include "stm32mp13xf.dtsi"
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#include "stm32mp13xx-dhcor-som.dtsi"
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/ {
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model = "DH electronics STM32MP135F DHCOR DHSBC";
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compatible = "dh,stm32mp135f-dhcor-dhsbc",
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"dh,stm32mp135f-dhcor-som",
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"st,stm32mp135";
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aliases {
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ethernet0 = ð1;
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ethernet1 = ð2;
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serial2 = &usart1;
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serial3 = &usart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&adc_1 {
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pinctrl-names = "default";
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pinctrl-0 = <&adc1_pins_a &adc1_usb_cc_pins_b>;
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vdda-supply = <&vdd_adc>;
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vref-supply = <&vdd_adc>;
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status = "okay";
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adc1: adc@0 {
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status = "okay";
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/*
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* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in2 & in11.
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* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
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* 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
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* Use arbitrary margin here (e.g. 5us).
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*
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* The pinmux pins must be set as ANALOG, use datasheet
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* DS13483 Table 7. STM32MP135C/F ball definitions to
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* find out which 'pin name' maps to which 'additional
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* functions', which lists the mapping between pin and
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* ADC channel. In this case, PA5 maps to ADC1_INP2 and
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* PF13 maps to ADC1_INP11 .
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*/
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channel@2 {
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reg = <2>;
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st,min-sample-time-ns = <5000>;
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};
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channel@11 {
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reg = <11>;
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st,min-sample-time-ns = <5000>;
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};
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/* Expansion connector: INP12:pin29 */
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channel@12 {
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reg = <12>;
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st,min-sample-time-ns = <5000>;
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};
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};
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};
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ð1 {
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status = "okay";
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pinctrl-0 = <ð1_rgmii_pins_a>;
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pinctrl-1 = <ð1_rgmii_sleep_pins_a>;
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pinctrl-names = "default", "sleep";
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phy-mode = "rgmii-id";
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phy-handle = <ðphy1>;
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st,ext-phyclk;
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nvmem-cells = <ðernet_mac1_address>;
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nvmem-cell-names = "mac-address";
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mdio1 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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ethphy1: ethernet-phy@1 {
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/* RTL8211F */
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compatible = "ethernet-phy-id001c.c916",
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"ethernet-phy-ieee802.3-c22";
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interrupt-parent = <&gpiog>;
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interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
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reg = <1>;
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reset-assert-us = <15000>;
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reset-deassert-us = <55000>;
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reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð2 {
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status = "okay";
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pinctrl-0 = <ð2_rgmii_pins_a>;
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pinctrl-1 = <ð2_rgmii_sleep_pins_a>;
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pinctrl-names = "default", "sleep";
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phy-mode = "rgmii-id";
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phy-handle = <ðphy2>;
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st,ext-phyclk;
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nvmem-cells = <ðernet_mac2_address>;
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nvmem-cell-names = "mac-address";
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mdio1 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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ethphy2: ethernet-phy@1 {
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/* RTL8211F */
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compatible = "ethernet-phy-id001c.c916",
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"ethernet-phy-ieee802.3-c22";
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interrupt-parent = <&gpiog>;
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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reg = <1>;
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reset-assert-us = <15000>;
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reset-deassert-us = <55000>;
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reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&gpioa {
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gpio-line-names = "", "", "", "",
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"", "DHSBC_USB_PWR_CC1", "", "",
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"", "", "", "DHSBC_nETH1_RST",
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"", "DHCOR_HW-CODING_0", "", "";
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};
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&gpiob {
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gpio-line-names = "", "", "", "",
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"", "", "", "DHCOR_BT_HOST_WAKE",
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"", "", "", "",
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"", "DHSBC_nTPM_CS", "", "";
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};
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&gpioc {
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gpio-line-names = "", "", "", "DHSBC_USB_5V_MEAS",
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"", "", "", "",
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"", "", "", "",
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"", "", "", "";
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};
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&gpiod {
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gpio-line-names = "", "", "", "",
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"", "DHCOR_RAM-CODING_0", "", "",
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"", "DHCOR_RAM-CODING_1", "", "",
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"", "", "", "";
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};
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&gpioe {
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gpio-line-names = "", "", "", "",
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"", "", "", "",
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"", "DHSBC_nTPM_RST", "", "",
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"DHSBC_nTPM_PIRQ", "", "DHCOR_WL_HOST_WAKE", "";
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};
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&gpiof {
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gpio-line-names = "", "", "DHSBC_USB_PWR_nFLT", "",
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"", "", "", "",
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"", "", "", "",
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"DHCOR_WL_REG_ON", "DHSBC_USB_PWR_CC2", "", "";
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};
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&gpiog {
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gpio-line-names = "", "", "", "",
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"", "", "", "",
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"DHSBC_nETH2_RST", "DHCOR_BT_DEV_WAKE", "", "",
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"DHSBC_ETH1_INTB", "", "", "DHSBC_ETH2_INTB";
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};
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&gpioi {
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gpio-line-names = "DHCOR_RTC_nINT", "DHCOR_HW-CODING_1",
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"DHCOR_BT_REG_ON", "DHCOR_PMIC_nINT",
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"DHSBC_BOOT0", "DHSBC_BOOT1",
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"DHSBC_BOOT2", "DHSBC_USB-C_DATA_VBUS";
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};
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&i2c1 { /* Expansion connector: SDA:pin27 SCL:pin28 */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c1_pins_a>;
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pinctrl-1 = <&i2c1_sleep_pins_a>;
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i2c-scl-rising-time-ns = <96>;
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i2c-scl-falling-time-ns = <3>;
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clock-frequency = <400000>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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};
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&i2c5 { /* Expansion connector: SDA:pin3 SCL:pin5 */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c5_pins_b>;
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pinctrl-1 = <&i2c5_sleep_pins_b>;
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i2c-scl-rising-time-ns = <96>;
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i2c-scl-falling-time-ns = <3>;
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clock-frequency = <400000>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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};
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&m_can1 { /* Expansion connector: TX:pin16 RX:pin18 */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&m_can1_pins_a>;
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pinctrl-1 = <&m_can1_sleep_pins_a>;
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status = "okay";
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};
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&m_can2 { /* Expansion connector: TX:pin22 RX:pin26 */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&m_can2_pins_a>;
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pinctrl-1 = <&m_can2_sleep_pins_a>;
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status = "okay";
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};
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&pwr_regulators {
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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status = "okay";
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};
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&sai1 { /* Expansion connector: SCK-A:pin12 FS-A:pin35 SD-A:pin38 SD-B:pin40 */
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clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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clock-names = "pclk", "x8k", "x11k";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sai1a_pins_a &sai1b_pins_a>;
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pinctrl-1 = <&sai1a_sleep_pins_a &sai1b_sleep_pins_a>;
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};
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&scmi_voltd {
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status = "disabled";
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};
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&spi2 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&spi2_pins_a>;
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pinctrl-1 = <&spi2_sleep_pins_a>;
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cs-gpios = <&gpiob 13 0>;
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status = "okay";
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st33htph: tpm@0 {
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compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
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reg = <0>;
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spi-max-frequency = <24000000>;
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};
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};
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&spi3 { /* Expansion connector: MOSI:pin19 MISO:pin21 SCK:pin22 nCS:pin24 */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&spi3_pins_a>;
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pinctrl-1 = <&spi3_sleep_pins_a>;
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cs-gpios = <&gpiof 3 0>;
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status = "disabled";
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};
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&timers5 { /* Expansion connector: CH3:pin31 */
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "okay";
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pwm {
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pinctrl-0 = <&pwm5_pins_a>;
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pinctrl-1 = <&pwm5_sleep_pins_a>;
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pinctrl-names = "default", "sleep";
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status = "okay";
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};
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timer@4 {
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status = "okay";
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};
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};
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&timers13 { /* Expansion connector: CH1:pin32 */
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "okay";
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pwm {
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pinctrl-0 = <&pwm13_pins_a>;
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pinctrl-1 = <&pwm13_sleep_pins_a>;
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pinctrl-names = "default", "sleep";
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status = "okay";
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};
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timer@12 {
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status = "okay";
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};
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};
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&usart1 { /* Expansion connector: RX:pin33 TX:pin37 */
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pinctrl-names = "default", "sleep", "idle";
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pinctrl-0 = <&usart1_pins_b>;
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pinctrl-1 = <&usart1_sleep_pins_b>;
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pinctrl-2 = <&usart1_idle_pins_b>;
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status = "okay";
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};
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&usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */
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pinctrl-names = "default", "sleep", "idle";
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pinctrl-0 = <&usart2_pins_b>;
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pinctrl-1 = <&usart2_sleep_pins_b>;
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pinctrl-2 = <&usart2_idle_pins_b>;
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uart-has-rtscts;
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status = "okay";
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};
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&usbh_ehci {
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phys = <&usbphyc_port0>;
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status = "okay";
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};
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&usbh_ohci {
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phys = <&usbphyc_port0>;
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status = "okay";
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};
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&usbotg_hs {
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dr_mode = "peripheral";
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phys = <&usbphyc_port1 0>;
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phy-names = "usb2-phy";
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usb33d-supply = <&usb33>;
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status = "okay";
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};
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&usbphyc {
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status = "okay";
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vdda1v1-supply = <®11>;
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vdda1v8-supply = <®18>;
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};
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&usbphyc_port0 {
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phy-supply = <&vdd_usb>;
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st,current-boost-microamp = <1000>;
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st,decrease-hs-slew-rate;
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st,tune-hs-dc-level = <2>;
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st,enable-hs-rftime-reduction;
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st,trim-hs-current = <11>;
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st,trim-hs-impedance = <2>;
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st,tune-squelch-level = <1>;
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st,enable-hs-rx-gain-eq;
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st,no-hs-ftime-ctrl;
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st,no-lsfs-sc;
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connector {
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compatible = "usb-a-connector";
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vbus-supply = <&vbus_sw>;
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};
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};
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&usbphyc_port1 {
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phy-supply = <&vdd_usb>;
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st,current-boost-microamp = <1000>;
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st,decrease-hs-slew-rate;
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st,tune-hs-dc-level = <2>;
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st,enable-hs-rftime-reduction;
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st,trim-hs-current = <11>;
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st,trim-hs-impedance = <2>;
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st,tune-squelch-level = <1>;
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st,enable-hs-rx-gain-eq;
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st,no-hs-ftime-ctrl;
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st,no-lsfs-sc;
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connector {
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compatible = "gpio-usb-b-connector", "usb-b-connector";
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vbus-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>;
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label = "Type-C";
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self-powered;
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type = "micro";
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};
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};
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308
arch/arm/dts/stm32mp13xx-dhcor-som.dtsi
Normal file
308
arch/arm/dts/stm32mp13xx-dhcor-som.dtsi
Normal file
@ -0,0 +1,308 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2024 Marek Vasut <marex@denx.de>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
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#include "stm32mp13-pinctrl.dtsi"
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/ {
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model = "DH electronics STM32MP13xx DHCOR SoM";
|
||||
compatible = "dh,stm32mp131a-dhcor-som",
|
||||
"st,stm32mp131";
|
||||
|
||||
aliases {
|
||||
mmc0 = &sdmmc2;
|
||||
mmc1 = &sdmmc1;
|
||||
serial0 = &uart4;
|
||||
serial1 = &uart7;
|
||||
rtc0 = &rv3032;
|
||||
spi0 = &qspi;
|
||||
};
|
||||
|
||||
memory@c0000000 {
|
||||
device_type = "memory";
|
||||
reg = <0xc0000000 0x20000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
optee@dd000000 {
|
||||
reg = <0xdd000000 0x3000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vin: vin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vin";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
i2c-scl-rising-time-ns = <96>;
|
||||
i2c-scl-falling-time-ns = <3>;
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
/* spare dmas for other usage */
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
pmic: stpmic@33 {
|
||||
compatible = "st,stpmic1";
|
||||
reg = <0x33>;
|
||||
interrupts-extended = <&gpioi 3 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
status = "okay";
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmic1-regulators";
|
||||
|
||||
ldo1-supply = <&vin>;
|
||||
ldo2-supply = <&vin>;
|
||||
ldo3-supply = <&vin>;
|
||||
ldo4-supply = <&vin>;
|
||||
ldo5-supply = <&vin>;
|
||||
ldo6-supply = <&vin>;
|
||||
pwr_sw1-supply = <&bst_out>;
|
||||
pwr_sw2-supply = <&bst_out>;
|
||||
|
||||
vddcpu: buck1 { /* VDD_CPU_1V2 */
|
||||
regulator-name = "vddcpu";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_ddr: buck2 { /* VDD_DDR_1V35 */
|
||||
regulator-name = "vdd_ddr";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd: buck3 { /* VDD_3V3_1V8 */
|
||||
regulator-name = "vdd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vddcore: buck4 { /* VDD_CORE_1V2 */
|
||||
regulator-name = "vddcore";
|
||||
regulator-min-microvolt = <1250000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_adc: ldo1 { /* VDD_ADC_1V8 */
|
||||
regulator-name = "vdd_adc";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
interrupts = <IT_CURLIM_LDO1 0>;
|
||||
};
|
||||
|
||||
vdd_ldo2: ldo2 { /* LDO2_OUT_1V8 */
|
||||
regulator-name = "vdd_ldo2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
interrupts = <IT_CURLIM_LDO2 0>;
|
||||
};
|
||||
|
||||
vdd_ldo3: ldo3 { /* LDO3_OUT */
|
||||
regulator-name = "vdd_ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
interrupts = <IT_CURLIM_LDO3 0>;
|
||||
};
|
||||
|
||||
vdd_usb: ldo4 { /* VDD_USB_3V3 */
|
||||
regulator-name = "vdd_usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO4 0>;
|
||||
};
|
||||
|
||||
vdd_sd: ldo5 { /* VDD_SD_3V3_1V8 */
|
||||
regulator-name = "vdd_sd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO5 0>;
|
||||
};
|
||||
|
||||
vdd_sd2: ldo6 { /* VDD_SD2_3V3_1V8 */
|
||||
regulator-name = "vdd_sd2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO6 0>;
|
||||
};
|
||||
|
||||
vref_ddr: vref_ddr { /* VREF_DDR_0V675 */
|
||||
regulator-name = "vref_ddr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
bst_out: boost { /* BST_OUT_5V2 */
|
||||
regulator-name = "bst_out";
|
||||
};
|
||||
|
||||
vbus_otg: pwr_sw1 {
|
||||
regulator-name = "vbus_otg";
|
||||
interrupts = <IT_OCP_OTG 0>;
|
||||
};
|
||||
|
||||
vbus_sw: pwr_sw2 {
|
||||
regulator-name = "vbus_sw";
|
||||
interrupts = <IT_OCP_SWOUT 0>;
|
||||
regulator-active-discharge = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
onkey {
|
||||
compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
|
||||
interrupt-names = "onkey-falling", "onkey-rising";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
eeprom0: eeprom@50 {
|
||||
compatible = "atmel,24c256"; /* ST M24256 */
|
||||
reg = <0x50>;
|
||||
pagesize = <64>;
|
||||
};
|
||||
|
||||
rv3032: rtc@51 {
|
||||
compatible = "microcrystal,rv3032";
|
||||
reg = <0x51>;
|
||||
interrupts-extended = <&gpioi 0 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&qspi_clk_pins_a
|
||||
&qspi_bk1_pins_a
|
||||
&qspi_cs1_pins_a>;
|
||||
pinctrl-1 = <&qspi_clk_sleep_pins_a
|
||||
&qspi_bk1_sleep_pins_a
|
||||
&qspi_cs1_sleep_pins_a>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
flash0: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <108000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Console UART */
|
||||
&uart4 {
|
||||
pinctrl-names = "default", "sleep", "idle";
|
||||
pinctrl-0 = <&uart4_pins_b>;
|
||||
pinctrl-1 = <&uart4_sleep_pins_b>;
|
||||
pinctrl-2 = <&uart4_idle_pins_b>;
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Bluetooth */
|
||||
&uart7 {
|
||||
pinctrl-names = "default", "sleep", "idle";
|
||||
pinctrl-0 = <&uart7_pins_a>;
|
||||
pinctrl-1 = <&uart7_sleep_pins_a>;
|
||||
pinctrl-2 = <&uart7_idle_pins_a>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
|
||||
max-speed = <3000000>;
|
||||
device-wakeup-gpios = <&gpiog 9 GPIO_ACTIVE_HIGH>;
|
||||
shutdown-gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* SDIO WiFi */
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
|
||||
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
|
||||
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
st,neg-edge;
|
||||
vmmc-supply = <&vdd>;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
brcmf: bcrmf@1 { /* muRata 1YN */
|
||||
reg = <1>;
|
||||
compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";
|
||||
interrupt-parent = <&gpioe>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&sdmmc2 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>;
|
||||
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>;
|
||||
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-3_3v;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
non-removable;
|
||||
st,neg-edge;
|
||||
vmmc-supply = <&vdd>;
|
||||
vqmmc-supply = <&vdd>;
|
||||
status = "okay";
|
||||
};
|
||||
55
arch/arm/dts/stm32mp13xx-dhcor-u-boot.dtsi
Normal file
55
arch/arm/dts/stm32mp13xx-dhcor-u-boot.dtsi
Normal file
@ -0,0 +1,55 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2024 Marek Vasut <marex@denx.de>
|
||||
*/
|
||||
|
||||
#include "stm32mp13-u-boot.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
eeprom0 = &eeprom0;
|
||||
};
|
||||
|
||||
config {
|
||||
dh,ddr3-coding-gpios = <&gpiod 5 0>, <&gpiod 9 0>;
|
||||
dh,som-coding-gpios = <&gpioa 13 0>, <&gpioi 1 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&flash0 {
|
||||
bootph-pre-ram;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "fsbl1";
|
||||
reg = <0x00000000 0x00040000>;
|
||||
};
|
||||
partition@40000 {
|
||||
label = "fsbl2";
|
||||
reg = <0x00040000 0x00040000>;
|
||||
};
|
||||
partition@80000 {
|
||||
label = "u-boot";
|
||||
reg = <0x00080000 0x00360000>;
|
||||
};
|
||||
partition@3e0000 {
|
||||
label = "u-boot-env-a";
|
||||
reg = <0x003e0000 0x00010000>;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "u-boot-env-b";
|
||||
reg = <0x003f0000 0x00010000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbotg_hs {
|
||||
u-boot,force-b-session-valid;
|
||||
};
|
||||
148
configs/stm32mp13_dhcor_defconfig
Normal file
148
configs/stm32mp13_dhcor_defconfig
Normal file
@ -0,0 +1,148 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_STM32MP=y
|
||||
CONFIG_TFABOOT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x1c0000
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_ENV_OFFSET=0x3E0000
|
||||
CONFIG_ENV_SECT_SIZE=0x1000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dhcor-dhsbc"
|
||||
CONFIG_STM32MP13X=y
|
||||
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
|
||||
CONFIG_CMD_STM32KEY=y
|
||||
CONFIG_TARGET_ST_STM32MP13X=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x3F0000
|
||||
CONFIG_CMD_STM32PROG=y
|
||||
CONFIG_STM32MP15_PWR=y
|
||||
# CONFIG_ARMV7_NONSEC is not set
|
||||
CONFIG_SYS_LOAD_ADDR=0xc2000000
|
||||
CONFIG_SYS_MEMTEST_START=0xc0000000
|
||||
CONFIG_SYS_MEMTEST_END=0xc4000000
|
||||
CONFIG_FIT=y
|
||||
CONFIG_SYS_BOOTM_LEN=0x2000000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_BOOTSTAGE_RECORD_COUNT=100
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
CONFIG_SYS_PROMPT="STM32MP> "
|
||||
# CONFIG_CMD_ELF is not set
|
||||
CONFIG_CMD_ASKENV=y
|
||||
# CONFIG_CMD_EXPORTENV is not set
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_EEPROM=y
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_CMD_UNZIP=y
|
||||
CONFIG_CMD_CLK=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_FUSE=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_LSBLK=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_CMD_CAT=y
|
||||
CONFIG_CMD_SETEXPR_FMT=y
|
||||
CONFIG_CMD_XXD=y
|
||||
CONFIG_CMD_DHCP6=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_SYS_DISABLE_AUTOLOAD=y
|
||||
CONFIG_CMD_WGET=y
|
||||
CONFIG_CMD_BOOTCOUNT=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_RNG=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_PMIC=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_BTRFS=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_LOG=y
|
||||
CONFIG_CMD_UBI=y
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_ENV_IS_NOWHERE=y
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_ENV_SPI_MAX_HZ=50000000
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_IP_DEFRAG=y
|
||||
CONFIG_TFTP_TSIZE=y
|
||||
CONFIG_PROT_TCP_SACK=y
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
|
||||
CONFIG_CLK_SCMI=y
|
||||
CONFIG_SET_DFU_ALT_INFO=y
|
||||
CONFIG_GPIO_HOG=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_STM32F7=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_GPIO=y
|
||||
CONFIG_STM32_FMC2_EBI=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_STM32_SDMMC2=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_PHY_STM32_USBPHYC=y
|
||||
CONFIG_PINCONF=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_STPMIC1=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_DM_REGULATOR_STPMIC1=y
|
||||
CONFIG_DM_REGULATOR_SCMI=y
|
||||
CONFIG_RESET_SCMI=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_STM32=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_RTC_STM32=y
|
||||
CONFIG_SERIAL_RX_BUFFER=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_STM32_QSPI=y
|
||||
CONFIG_STM32_SPI=y
|
||||
CONFIG_SYSRESET_PSCI=y
|
||||
CONFIG_TEE=y
|
||||
CONFIG_OPTEE=y
|
||||
# CONFIG_OPTEE_TA_AVB is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_ONBOARD_HUB=y
|
||||
CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000
|
||||
CONFIG_USB_HOST_ETHER=y
|
||||
CONFIG_USB_ETHER_ASIX=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="dh"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0483
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
|
||||
CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_WDT_STM32MP=y
|
||||
CONFIG_FAT_WRITE=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
Loading…
Reference in New Issue
Block a user