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imx: flea3: Convert to iomux-v3
There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This commit is contained in:
parent
52b9d3cfd3
commit
686e14488e
@ -29,8 +29,7 @@
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#include <asm/errno.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/mx35_pins.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/iomux-mx35.h>
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#include <i2c.h>
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#include <linux/types.h>
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#include <asm/gpio.h>
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@ -165,62 +164,68 @@ static void board_setup_sdram(void)
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static void setup_iomux_uart3(void)
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{
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mxc_request_iomux(MX35_PIN_RTS2, MUX_CONFIG_ALT7);
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mxc_request_iomux(MX35_PIN_CTS2, MUX_CONFIG_ALT7);
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static const iomux_v3_cfg_t uart3_pads[] = {
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MX35_PAD_RTS2__UART3_RXD_MUX,
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MX35_PAD_CTS2__UART3_TXD_MUX,
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};
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imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
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}
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#define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_ODE)
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static void setup_iomux_i2c(void)
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{
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int pad;
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static const iomux_v3_cfg_t i2c_pads[] = {
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NEW_PAD_CTRL(MX35_PAD_I2C1_CLK__I2C1_SCL, I2C_PAD_CTRL),
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NEW_PAD_CTRL(MX35_PAD_I2C1_DAT__I2C1_SDA, I2C_PAD_CTRL),
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mxc_request_iomux(MX35_PIN_I2C1_CLK, MUX_CONFIG_SION);
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mxc_request_iomux(MX35_PIN_I2C1_DAT, MUX_CONFIG_SION);
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NEW_PAD_CTRL(MX35_PAD_TX3_RX2__I2C3_SCL, I2C_PAD_CTRL),
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NEW_PAD_CTRL(MX35_PAD_TX2_RX3__I2C3_SDA, I2C_PAD_CTRL),
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};
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pad = (PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE \
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| PAD_CTL_PUE_PUD | PAD_CTL_ODE_OpenDrain);
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mxc_iomux_set_pad(MX35_PIN_I2C1_CLK, pad);
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mxc_iomux_set_pad(MX35_PIN_I2C1_DAT, pad);
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mxc_request_iomux(MX35_PIN_TX3_RX2, MUX_CONFIG_ALT1);
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mxc_request_iomux(MX35_PIN_TX2_RX3, MUX_CONFIG_ALT1);
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mxc_iomux_set_pad(MX35_PIN_TX3_RX2, pad);
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mxc_iomux_set_pad(MX35_PIN_TX2_RX3, pad);
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imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads));
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}
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static void setup_iomux_spi(void)
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{
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mxc_request_iomux(MX35_PIN_CSPI1_MOSI, MUX_CONFIG_SION);
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mxc_request_iomux(MX35_PIN_CSPI1_MISO, MUX_CONFIG_SION);
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mxc_request_iomux(MX35_PIN_CSPI1_SS0, MUX_CONFIG_SION);
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mxc_request_iomux(MX35_PIN_CSPI1_SS1, MUX_CONFIG_SION);
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mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_SION);
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static const iomux_v3_cfg_t spi_pads[] = {
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MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
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MX35_PAD_CSPI1_MISO__CSPI1_MISO,
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MX35_PAD_CSPI1_SS0__CSPI1_SS0,
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MX35_PAD_CSPI1_SS1__CSPI1_SS1,
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MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
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};
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imx_iomux_v3_setup_multiple_pads(spi_pads, ARRAY_SIZE(spi_pads));
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}
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static void setup_iomux_fec(void)
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{
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/* setup pins for FEC */
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mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC);
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static const iomux_v3_cfg_t fec_pads[] = {
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MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
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MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
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MX35_PAD_FEC_RX_DV__FEC_RX_DV,
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MX35_PAD_FEC_COL__FEC_COL,
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MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
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MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
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MX35_PAD_FEC_TX_EN__FEC_TX_EN,
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MX35_PAD_FEC_MDC__FEC_MDC,
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MX35_PAD_FEC_MDIO__FEC_MDIO,
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MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
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MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
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MX35_PAD_FEC_CRS__FEC_CRS,
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MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
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MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
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MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
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MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
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MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
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MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
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};
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/* setup pins for FEC */
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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}
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int board_early_init_f(void)
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@ -229,7 +234,7 @@ int board_early_init_f(void)
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(struct ccm_regs *)IMX_CCM_BASE;
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/* setup GPIO3_1 to set HighVCore signal */
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mxc_request_iomux(MX35_PIN_ATA_DA1, MUX_CONFIG_ALT5);
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imx_iomux_v3_setup_pad(MX35_PAD_ATA_DA1__GPIO3_1);
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gpio_direction_output(65, 1);
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/* initialize PLL and clock configuration */
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