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x86: kconfig: Imply ENABLE_MRC_CACHE in the platform Kconfig
Platform knows whether MRC cache is implemented, but using it can be a choice of a specific board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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5d89b37f71
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@ -10,6 +10,7 @@ config INTEL_BAYTRAIL
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select ARCH_MISC_INIT if !EFI
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imply ENV_IS_IN_SPI_FLASH
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imply HAVE_INTEL_ME if !EFI
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imply ENABLE_MRC_CACHE
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if INTEL_BAYTRAIL
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config INTERNAL_UART
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@ -8,6 +8,7 @@ config INTEL_BROADWELL
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select CACHE_MRC_BIN
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select ARCH_EARLY_INIT_R
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imply HAVE_INTEL_ME
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imply ENABLE_MRC_CACHE
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if INTEL_BROADWELL
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@ -9,6 +9,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
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bool
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select CACHE_MRC_BIN if HAVE_MRC
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imply HAVE_INTEL_ME
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imply ENABLE_MRC_CACHE
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if NORTHBRIDGE_INTEL_IVYBRIDGE
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@ -9,6 +9,7 @@ config INTEL_QUARK
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select HAVE_RMU
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select ARCH_EARLY_INIT_R
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select ARCH_MISC_INIT
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imply ENABLE_MRC_CACHE
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if INTEL_QUARK
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@ -3,7 +3,6 @@ CONFIG_VENDOR_INTEL=y
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CONFIG_DEFAULT_DEVICE_TREE="bayleybay"
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CONFIG_TARGET_BAYLEYBAY=y
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CONFIG_INTERNAL_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_VGA_BIOS_ADDR=0xfffa0000
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@ -11,7 +11,6 @@ CONFIG_VENDOR_GOOGLE=y
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CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
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CONFIG_TARGET_CHROMEBOOK_LINK64=y
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_HAVE_MRC=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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@ -4,7 +4,6 @@ CONFIG_VENDOR_GOOGLE=y
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CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
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CONFIG_TARGET_CHROMEBOOK_LINK=y
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_HAVE_MRC=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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@ -4,7 +4,6 @@ CONFIG_VENDOR_GOOGLE=y
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CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
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CONFIG_TARGET_CHROMEBOOK_SAMUS=y
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_HAVE_MRC=y
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CONFIG_HAVE_REFCODE=y
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CONFIG_SMP=y
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@ -2,7 +2,6 @@ CONFIG_X86=y
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CONFIG_VENDOR_GOOGLE=y
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CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther"
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CONFIG_TARGET_CHROMEBOX_PANTHER=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_HAVE_MRC=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_FIT=y
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@ -4,7 +4,6 @@ CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
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CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
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CONFIG_INTERNAL_UART=y
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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@ -3,7 +3,6 @@ CONFIG_VENDOR_CONGATEC=y
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CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
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CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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@ -2,6 +2,7 @@ CONFIG_X86=y
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CONFIG_VENDOR_INTEL=y
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CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
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CONFIG_TARGET_COUGARCANYON2=y
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# CONFIG_ENABLE_MRC_CACHE is not set
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_CONSOLE_MUX=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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@ -3,7 +3,6 @@ CONFIG_VENDOR_DFI=y
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CONFIG_DEFAULT_DEVICE_TREE="dfi-bt700-q7x-151"
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CONFIG_TARGET_DFI_BT700=y
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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@ -2,7 +2,6 @@ CONFIG_X86=y
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CONFIG_VENDOR_INTEL=y
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CONFIG_DEFAULT_DEVICE_TREE="galileo"
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CONFIG_TARGET_GALILEO=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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CONFIG_GENERATE_MP_TABLE=y
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CONFIG_GENERATE_ACPI_TABLE=y
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@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="minnowmax"
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CONFIG_TARGET_MINNOWMAX=y
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CONFIG_INTERNAL_UART=y
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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@ -3,7 +3,6 @@ CONFIG_VENDOR_ADVANTECH=y
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CONFIG_TARGET_SOM_DB5800_SOM_6867=y
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CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867"
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CONFIG_DEBUG_UART=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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@ -2,7 +2,6 @@ CONFIG_X86=y
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CONFIG_VENDOR_DFI=y
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CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700"
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CONFIG_TARGET_DFI_BT700=y
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CONFIG_ENABLE_MRC_CACHE=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_VGA_BIOS_ADDR=0xfffa0000
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