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arm/dcc: use static support to allow to use it at anytime
the dcc can be used at the start of the cpu Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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7893aa1eb6
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@ -29,69 +29,50 @@
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#include <common.h>
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#include <devices.h>
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#define DCC_ARM9_RBIT (1 << 0)
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#define DCC_ARM9_WBIT (1 << 1)
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#define DCC_ARM11_RBIT (1 << 30)
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#define DCC_ARM11_WBIT (1 << 29)
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#define read_core_id(x) do { \
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__asm__ ("mrc p15, 0, %0, c0, c0, 0\n" : "=r" (x)); \
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x = (x >> 4) & 0xFFF; \
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} while (0);
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#if defined(CONFIG_CPU_V6)
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/*
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* ARM9
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* ARMV6
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*/
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#define write_arm9_dcc(x) \
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__asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x))
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#define DCC_RBIT (1 << 30)
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#define DCC_WBIT (1 << 29)
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#define read_arm9_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x))
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#define status_arm9_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x))
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#define can_read_arm9_dcc(x) do { \
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status_arm9_dcc(x); \
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x &= DCC_ARM9_RBIT; \
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} while (0);
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#define can_write_arm9_dcc(x) do { \
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status_arm9_dcc(x); \
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x &= DCC_ARM9_WBIT; \
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x = (x == 0); \
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} while (0);
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/*
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* ARM11
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*/
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#define write_arm11_dcc(x) \
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#define write_dcc(x) \
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__asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x))
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#define read_arm11_dcc(x) \
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#define read_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x))
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#define status_arm11_dcc(x) \
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#define status_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x))
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#define can_read_arm11_dcc(x) do { \
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status_arm11_dcc(x); \
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x &= DCC_ARM11_RBIT; \
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#else
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#define DCC_RBIT (1 << 0)
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#define DCC_WBIT (1 << 1)
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#define write_dcc(x) \
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__asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x))
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#define read_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x))
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#define status_dcc(x) \
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__asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x))
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#endif
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#define can_read_dcc(x) do { \
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status_dcc(x); \
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x &= DCC_RBIT; \
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} while (0);
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#define can_write_arm11_dcc(x) do { \
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status_arm11_dcc(x); \
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x &= DCC_ARM11_WBIT; \
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x = (x == 0); \
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#define can_write_dcc(x) do { \
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status_dcc(x); \
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x &= DCC_WBIT; \
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x = (x == 0); \
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} while (0);
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#define TIMEOUT_COUNT 0x4000000
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static enum {
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arm9_and_earlier,
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arm11_and_later
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} arm_type = arm9_and_earlier;
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#ifndef CONFIG_ARM_DCC_MULTI
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#define arm_dcc_init serial_init
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void serial_setbrg(void) {}
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@ -103,15 +84,6 @@ void serial_setbrg(void) {}
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int arm_dcc_init(void)
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{
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register unsigned int id;
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read_core_id(id);
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if (id >= 0xb00)
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arm_type = arm11_and_later;
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else
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arm_type = arm9_and_earlier;
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return 0;
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}
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@ -120,22 +92,10 @@ int arm_dcc_getc(void)
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int ch;
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register unsigned int reg;
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switch (arm_type) {
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case arm11_and_later:
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do {
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can_read_arm11_dcc(reg);
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} while (!reg);
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read_arm11_dcc(ch);
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break;
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case arm9_and_earlier:
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default:
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do {
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can_read_arm9_dcc(reg);
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} while (!reg);
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read_arm9_dcc(ch);
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break;
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}
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do {
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can_read_dcc(reg);
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} while (!reg);
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read_dcc(ch);
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return ch;
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}
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@ -145,32 +105,15 @@ void arm_dcc_putc(char ch)
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register unsigned int reg;
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unsigned int timeout_count = TIMEOUT_COUNT;
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switch (arm_type) {
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case arm11_and_later:
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while (--timeout_count) {
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can_write_arm11_dcc(reg);
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if (reg)
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break;
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}
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if (timeout_count == 0)
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return;
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else
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write_arm11_dcc(ch);
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break;
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case arm9_and_earlier:
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default:
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while (--timeout_count) {
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can_write_arm9_dcc(reg);
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if (reg)
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break;
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}
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if (timeout_count == 0)
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return;
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else
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write_arm9_dcc(ch);
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break;
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while (--timeout_count) {
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can_write_dcc(reg);
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if (reg)
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break;
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}
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if (timeout_count == 0)
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return;
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else
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write_dcc(ch);
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}
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void arm_dcc_puts(const char *s)
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@ -183,15 +126,7 @@ int arm_dcc_tstc(void)
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{
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register unsigned int reg;
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switch (arm_type) {
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case arm11_and_later:
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can_read_arm11_dcc(reg);
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break;
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case arm9_and_earlier:
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default:
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can_read_arm9_dcc(reg);
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break;
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}
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can_read_dcc(reg);
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return reg;
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}
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@ -214,13 +149,6 @@ int drv_arm_dcc_init(void)
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arm_dcc_dev.putc = arm_dcc_putc; /* 'putc' function */
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arm_dcc_dev.puts = arm_dcc_puts; /* 'puts' function */
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rc = device_register(&arm_dcc_dev);
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if (rc == 0) {
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arm_dcc_init();
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return 1;
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}
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return 0;
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return device_register(&arm_dcc_dev);
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}
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#endif
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