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Merge branch '2022-08-04-assorted-fixed'

Browse Source 
- Assorted TI, aspeed, xen updates
- Assorted return / error checking fixes in commands
- SPL MMC bugfix to get the correct device in some cases
- SPL related depends fixes
- Remove deprecated LCD command
- Some tool fixes
This commit is contained in:
Tom Rini 2022-08-04 16:02:42 -04:00
commit 62e6418031
21 changed files with 521 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/dts/nuvoton-common-npcm7xx.dtsi
View File

@ -559,6 +559,9 @@
#size-cells = <1>;
compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
ranges = <0 0xf0010000 0x8000>;
reg = <0xf0010000 0x8000>;
syscon-gcr = <&gcr>;
syscon-rst = <&rst>;
gpio0: gpio@f0010000 {
gpio-controller;
#gpio-cells = <2>;

63
arch/arm/dts/nuvoton-npcm750-evb.dts
View File

@ -12,8 +12,8 @@
compatible = "nuvoton,npcm750-evb", "nuvoton,npcm750";
aliases {
ethernet2 = &gmac0;
ethernet3 = &gmac1;
eth0 = &emc0;
eth1 = &gmac0;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
@ -34,11 +34,11 @@
i2c13 = &i2c13;
i2c14 = &i2c14;
i2c15 = &i2c15;
spi0 = &spi0;
spi1 = &spi1;
fiu0 = &fiu0;
fiu1 = &fiu3;
fiu2 = &fiux;
spi0 = &fiu0;
spi1 = &fiu3;
spi2 = &fiux;
spi3 = &spi0;
spi4 = &spi1;
};
chosen {
@ -51,18 +51,20 @@
};
};
&gmac0 {
phy-mode = "rgmii-id";
&udc0 {
status = "okay";
phys = <&usbphy1 0>;
};
&gmac1 {
&gmac0 {
phy-mode = "rgmii-id";
snps,eee-force-disable;
status = "okay";
};
&ehci1 {
status = "okay";
phys = <&usbphy2 3>;
};
&fiu0 {
@ -151,7 +153,7 @@
spix-mode;
};
&watchdog1 {
&watchdog0 {
status = "okay";
};
@ -159,6 +161,14 @@
status = "okay";
};
&sha {
status = "okay";
};
&aes {
status = "okay";
};
&serial0 {
status = "okay";
clock-frequency = <24000000>;
@ -403,3 +413,34 @@
&pin255_input>;
};
&ehci1 {
status = "okay";
phys = <&usbphy2 3>;
};
&otp {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&usbphy2 {
status = "okay";
};
&emc0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&r1_pins
&r1err_pins>;
fixed-link {
speed = <100>;
full-dulpex;
};
};
&sdhci0 {
status = "okay";
};

1
arch/arm/dts/nuvoton-npcm750.dtsi
View File

@ -3,6 +3,7 @@
// Copyright 2018 Google, Inc.
#include "nuvoton-common-npcm7xx.dtsi"
#include "nuvoton-npcm7xx-u-boot.dtsi"
/ {
#address-cells = <1>;

287
arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi Normal file
View File

@ -0,0 +1,287 @@
// SPDX-License-Identifier: GPL-2.0
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&watchdog0>;
};
ahb {
udc0:udc@f0830100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0830100 0x200
0xfffd0000 0x800>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_UDC0>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc1:udc@f0831100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0831100 0x200
0xfffd0800 0x800>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc2: udc@f0832100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0832100 0x200
0xfffd1000 0x800>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc3: udc@f0833100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0833100 0x200
0xfffd1800 0x800>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc4: udc@f0834100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0834100 0x200
0xfffd2000 0x800>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc5: udc@f0835100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0835100 0x200
0xfffd2800 0x800>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc6: udc@f0836100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0836100 0x200
0xfffd3000 0x800>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc7: udc@f0837100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0837100 0x200
0xfffd3800 0x800>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc8: udc@f0838100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0838100 0x200
0xfffd4000 0x800>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
udc9: udc@f0839100 {
compatible = "nuvoton,npcm750-udc";
reg = <0xf0839100 0x200
0xfffd4800 0x800>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_SU>;
clock-names = "clk_usb_bridge";
};
emc0: eth@f0825000 {
device_type = "network";
compatible = "nuvoton,npcm750-emc";
reg = <0xf0825000 0x1000>;
phy-mode = "rmii";
id = <0>;
syscon-gcr = <&gcr>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_AHB>;
clock-names = "clk_emc";
resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_EMC1>;
pinctrl-names = "default";
pinctrl-0 = <&r1_pins
&r1md_pins>;
status = "disabled";
};
ohci1: ohci@f0807000 {
compatible = "nuvoton,npcm750-ohci";
reg = <0xf0807000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_USB_HOST>;
status = "disabled";
};
usbphy {
compatible = "simple-bus", "nuvoton,npcm750-usb-phy";
#address-cells = <1>;
#size-cells = <0>;
syscon = <&gcr>;
usbphy1: usbphy1 {
compatible = "nuvoton,npcm750-usb-phy";
#phy-cells = <1>;
reg = <1>;
resets = <&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_USB_PHY_1>;
status = "disabled";
};
usbphy2: usbphy2 {
compatible = "nuvoton,npcm750-usb-phy";
#phy-cells = <1>;
reg = <2>;
resets =<&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_USB_PHY_2>;
status = "disabled";
};
};
sdhci0: sdhci0@f0842000 {
compatible = "nuvoton,npcm750-sdhci";
reg = <0xf0842000 0x200>;
index = <0x0>;
bus-width = <0x8>;
cap-mmc-highspeed;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM7XX_CLK_SDHC>;
clock-frequency = <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&mmc_pins
&mmc8_pins>;
status = "disabled";
};
sdhci1: sdhci1@f0840000 {
compatible = "nuvoton,npcm750-sdhci";
reg = <0xf0840000 0x2000>;
index = <0x1>;
bus-width = <0x4>;
cap-mmc-highspeed;
pinctrl-names = "default";
pinctrl-0 = <&sd1_pins>;
status = "disabled";
};
aes: aes@f0858000 {
compatible = "nuvoton,npcm750-aes";
reg = <0xf0858000 0x1000>;
clocks = <&clk NPCM7XX_CLK_AHB>;
clock-names = "clk_ahb";
status = "disabled";
};
sha: sha@f085a000 {
compatible = "nuvoton,npcm750-sha";
reg = <0xf085a000 0x1000>;
clocks = <&clk NPCM7XX_CLK_AHB>;
clock-names = "clk_ahb";
status = "disabled";
};
//ehci1
usb@f0806000 {
resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_USB_HOST>;
};
apb {
otp:otp@189000 {
compatible = "nuvoton,npcm750-otp";
reg = <0x189000 0x1000
0x18a000 0x1000>;
status = "disabled";
clocks = <&clk NPCM7XX_CLK_APB4>;
clock-names = "clk_apb4";
};
rng@b000 {
clocks = <&clk NPCM7XX_CLK_APB1>;
};
gpio_0: gpio0@10000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x10000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio0";
};
gpio_1: gpio1@11000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x11000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio1";
};
gpio_2: gpio2@12000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x12000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio2";
};
gpio_3: gpio3@13000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x13000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio3";
};
gpio_4: gpio4@14000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x14000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio4";
};
gpio_5: gpio5@15000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x15000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio5";
};
gpio_6: gpio6@16000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x16000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio6";
};
gpio_7: gpio7@17000 {
compatible = "nuvoton,npcm-gpio";
reg = <0x17000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio7";
};
};
};
};

6
arch/arm/mach-imx/mx7ulp/Kconfig
View File

@ -24,16 +24,16 @@ config TARGET_MX7ULP_COM
select MX7ULP
select SYS_ARCH_TIMER
select SPL_DM if SPL
select SPL_GPIO_SUPPORT if SPL
select SPL_GPIO if SPL
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
select SPL_MMC_SUPPORT if SPL
select SPL_MMC if SPL
select SPL_OF_CONTROL if SPL
select SPL_OF_LIBFDT if SPL
select SPL_PINCTRL if SPL
select SPL_SEPARATE_BSS if SPL
select SPL_SERIAL_SUPPORT if SPL
select SPL_SERIAL if SPL
select SUPPORT_SPL
config TARGET_MX7ULP_EVK

3
arch/arm/mach-k3/Makefile
View File

@ -8,7 +8,6 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
obj-$(CONFIG_SOC_K3_AM625) += am62x/
obj-$(CONFIG_ARM64) += arm64-mmu.o
obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
obj-$(CONFIG_TI_SECURE_DEVICE) += security.o
obj-$(CONFIG_ARM64) += cache.o
ifeq ($(CONFIG_SPL_BUILD),y)
obj-$(CONFIG_SOC_K3_AM654) += am654_init.o
@ -18,4 +17,4 @@ obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o
endif
obj-y += common.o
obj-y += common.o security.o

53
arch/arm/mach-k3/common.c
View File

@ -290,9 +290,7 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image,
}
#endif
#if IS_ENABLED(CONFIG_TI_SECURE_DEVICE)
ti_secure_image_post_process(p_image, p_size);
#endif
}
#endif
@ -396,7 +394,54 @@ void reset_cpu(void)
}
#endif
enum k3_device_type get_device_type(void)
{
u32 sys_status = readl(K3_SEC_MGR_SYS_STATUS);
u32 sys_dev_type = (sys_status & SYS_STATUS_DEV_TYPE_MASK) >>
SYS_STATUS_DEV_TYPE_SHIFT;
u32 sys_sub_type = (sys_status & SYS_STATUS_SUB_TYPE_MASK) >>
SYS_STATUS_SUB_TYPE_SHIFT;
switch (sys_dev_type) {
case SYS_STATUS_DEV_TYPE_GP:
return K3_DEVICE_TYPE_GP;
case SYS_STATUS_DEV_TYPE_TEST:
return K3_DEVICE_TYPE_TEST;
case SYS_STATUS_DEV_TYPE_EMU:
return K3_DEVICE_TYPE_EMU;
case SYS_STATUS_DEV_TYPE_HS:
if (sys_sub_type == SYS_STATUS_SUB_TYPE_VAL_FS)
return K3_DEVICE_TYPE_HS_FS;
else
return K3_DEVICE_TYPE_HS_SE;
default:
return K3_DEVICE_TYPE_BAD;
}
}
#if defined(CONFIG_DISPLAY_CPUINFO)
static const char *get_device_type_name(void)
{
enum k3_device_type type = get_device_type();
switch (type) {
case K3_DEVICE_TYPE_GP:
return "GP";
case K3_DEVICE_TYPE_TEST:
return "TEST";
case K3_DEVICE_TYPE_EMU:
return "EMU";
case K3_DEVICE_TYPE_HS_FS:
return "HS-FS";
case K3_DEVICE_TYPE_HS_SE:
return "HS-SE";
default:
return "BAD";
}
}
int print_cpuinfo(void)
{
struct udevice *soc;
@ -418,9 +463,11 @@ int print_cpuinfo(void)
ret = soc_get_revision(soc, name, 64);
if (!ret) {
printf("%s\n", name);
printf("%s ", name);
}
printf("%s\n", get_device_type_name());
return 0;
}
#endif

10
arch/arm/mach-k3/common.h
View File

@ -18,6 +18,15 @@ struct fwl_data {
u16 regions;
};
enum k3_device_type {
K3_DEVICE_TYPE_BAD,
K3_DEVICE_TYPE_GP,
K3_DEVICE_TYPE_TEST,
K3_DEVICE_TYPE_EMU,
K3_DEVICE_TYPE_HS_FS,
K3_DEVICE_TYPE_HS_SE,
};
void setup_k3_mpu_regions(void);
int early_console_init(void);
void disable_linefill_optimization(void);
@ -27,4 +36,5 @@ void k3_sysfw_print_ver(void);
void spl_enable_dcache(void);
void mmr_unlock(phys_addr_t base, u32 partition);
bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
enum k3_device_type get_device_type(void);
void ti_secure_image_post_process(void **p_image, size_t *p_size);

10
arch/arm/mach-k3/include/mach/hardware.h
View File

@ -32,6 +32,16 @@
#define JTAG_ID_VARIANT_MASK (0xf << 28)
#define JTAG_ID_PARTNO_SHIFT 12
#define JTAG_ID_PARTNO_MASK (0xffff << 12)
#define K3_SEC_MGR_SYS_STATUS 0x44234100
#define SYS_STATUS_DEV_TYPE_SHIFT 0
#define SYS_STATUS_DEV_TYPE_MASK (0xf)
#define SYS_STATUS_DEV_TYPE_GP 0x3
#define SYS_STATUS_DEV_TYPE_TEST 0x5
#define SYS_STATUS_DEV_TYPE_EMU 0x9
#define SYS_STATUS_DEV_TYPE_HS 0xa
#define SYS_STATUS_SUB_TYPE_SHIFT 8
#define SYS_STATUS_SUB_TYPE_MASK (0xf << 8)
#define SYS_STATUS_SUB_TYPE_VAL_FS 0xa
#define K3_ROM_BOOT_HEADER_MAGIC "EXTBOOT"

53
arch/arm/mach-k3/security.c
View File

@ -2,10 +2,11 @@
/*
* K3: Security functions
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2018-2022 Texas Instruments Incorporated - http://www.ti.com/
* Andrew F. Davis <afd@ti.com>
*/
#include <asm/io.h>
#include <common.h>
#include <cpu_func.h>
#include <dm.h>
@ -18,10 +19,30 @@
#include <spl.h>
#include <asm/arch/sys_proto.h>
#include "common.h"
static bool ti_secure_cert_detected(void *p_image)
{
/* Primitive certificate detection, check for DER starting with
* two 4-Octet SEQUENCE tags
*/
return (((u8 *)p_image)[0] == 0x30 && ((u8 *)p_image)[1] == 0x82 &&
((u8 *)p_image)[4] == 0x30 && ((u8 *)p_image)[5] == 0x82);
}
/* Primitive certificate length, assumes one 2-Octet sized SEQUENCE */
static size_t ti_secure_cert_length(void *p_image)
{
size_t seq_length = be16_to_cpu(readw_relaxed(p_image + 2));
/* Add 4 for the SEQUENCE tag length */
return seq_length + 4;
}
void ti_secure_image_post_process(void **p_image, size_t *p_size)
{
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
size_t cert_length;
u64 image_addr;
u32 image_size;
int ret;
@ -29,6 +50,36 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
image_addr = (uintptr_t)*p_image;
image_size = *p_size;
if (!image_size)
return;
if (get_device_type() == K3_DEVICE_TYPE_GP) {
if (ti_secure_cert_detected(*p_image)) {
printf("Warning: Detected image signing certificate on GP device. "
"Skipping certificate to prevent boot failure. "
"This will fail if the image was also encrypted\n");
cert_length = ti_secure_cert_length(*p_image);
if (cert_length > *p_size) {
printf("Invalid signing certificate size\n");
return;
}
*p_image += cert_length;
*p_size -= cert_length;
}
return;
}
if (get_device_type() != K3_DEVICE_TYPE_HS_SE &&
!ti_secure_cert_detected(*p_image)) {
printf("Warning: Did not detect image signing certificate. "
"Skipping authentication to prevent boot failure. "
"This will fail on Security Enforcing(HS-SE) devices\n");
return;
}
debug("Authenticating image at address 0x%016llx\n", image_addr);
debug("Authenticating image of size %d bytes\n", image_size);

4
board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
View File

@ -206,7 +206,7 @@ int board_late_init(void)
return 0;
}
#ifdef CONFIG_SPL_MMC_SUPPORT
#ifdef CONFIG_SPL_MMC
#define UBOOT_RAW_SECTOR_OFFSET 0x40
unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
{
@ -219,4 +219,4 @@ unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR;
}
}
#endif /* CONFIG_SPL_MMC_SUPPORT */
#endif /* CONFIG_SPL_MMC */

9
cmd/adc.c
View File

@ -71,6 +71,7 @@ static int do_adc_info(struct cmd_tbl *cmdtp, int flag, int argc,
static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
char *varname = NULL;
struct udevice *dev;
unsigned int data;
int ret, uV, val;
@ -78,6 +79,9 @@ static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc < 3)
return CMD_RET_USAGE;
if (argc >= 4)
varname = argv[3];
ret = adc_channel_single_shot(argv[1], simple_strtol(argv[2], NULL, 0),
&data);
if (ret) {
@ -95,7 +99,8 @@ static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
printf("%u\n", data);
}
env_set_ulong(argv[2], val);
if (varname)
env_set_ulong(varname, val);
return CMD_RET_SUCCESS;
}
@ -160,5 +165,5 @@ static char adc_help_text[] =
U_BOOT_CMD_WITH_SUBCMDS(adc, "ADC sub-system", adc_help_text,
U_BOOT_SUBCMD_MKENT(list, 1, 1, do_adc_list),
U_BOOT_SUBCMD_MKENT(info, 2, 1, do_adc_info),
U_BOOT_SUBCMD_MKENT(single, 3, 1, do_adc_single),
U_BOOT_SUBCMD_MKENT(single, 4, 1, do_adc_single),
U_BOOT_SUBCMD_MKENT(scan, 3, 1, do_adc_scan));

20
cmd/cls.c
View File

@ -8,7 +8,6 @@
#include <common.h>
#include <command.h>
#include <dm.h>
#include <lcd.h>
#include <video.h>
#define CSI "\x1b["
@ -20,19 +19,12 @@ static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc,
/* Send clear screen and home */
printf(CSI "2J" CSI "1;1H");
#if defined(CONFIG_DM_VIDEO)
#if !defined(CONFIG_VIDEO_ANSI)
if (uclass_first_device_err(UCLASS_VIDEO, &dev))
return CMD_RET_FAILURE;
if (video_clear(dev))
return CMD_RET_FAILURE;
#endif
#elif defined(CONFIG_LCD)
lcd_clear();
#else
return CMD_RET_FAILURE;
#endif
if (CONFIG_IS_ENABLED(DM_VIDEO) && !CONFIG_IS_ENABLED(VIDEO_ANSI)) {
if (uclass_first_device_err(UCLASS_VIDEO, &dev))
return CMD_RET_FAILURE;
if (video_clear(dev))
return CMD_RET_FAILURE;
}
return CMD_RET_SUCCESS;
}

1
cmd/extension_board.c
View File

@ -111,6 +111,7 @@ static int do_extension_apply(struct cmd_tbl *cmdtp, int flag,
return CMD_RET_USAGE;
if (strcmp(argv[1], "all") == 0) {
ret = CMD_RET_FAILURE;
list_for_each_entry(extension, &extension_list, list) {
ret = extension_apply(extension);
if (ret != CMD_RET_SUCCESS)

2
common/spl/Kconfig.vpl
View File

@ -166,7 +166,7 @@ config VPL_SERIAL
select VPL_PRINTF
select VPL_STRTO
help
Enable support for serial in VPL. See SPL_SERIAL_SUPPORT for
Enable support for serial in VPL. See SPL_SERIAL for
details.
config VPL_SIZE_LIMIT

17
common/spl/spl_mmc.c
View File

@ -398,6 +398,17 @@ int __weak spl_mmc_emmc_boot_partition(struct mmc *mmc)
return default_spl_mmc_emmc_boot_partition(mmc);
}
static int spl_mmc_get_mmc_devnum(struct mmc *mmc)
{
struct blk_desc *block_dev;
#if !CONFIG_IS_ENABLED(BLK)
block_dev = &mmc->block_dev;
#else
block_dev = dev_get_uclass_plat(mmc->dev);
#endif
return block_dev->devnum;
}
int spl_mmc_load(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
const char *filename,
@ -408,9 +419,11 @@ int spl_mmc_load(struct spl_image_info *spl_image,
u32 boot_mode;
int err = 0;
__maybe_unused int part = 0;
int mmc_dev;
/* Perform peripheral init only once */
if (!mmc) {
/* Perform peripheral init only once for an mmc device */
mmc_dev = spl_mmc_get_device_index(bootdev->boot_device);
if (!mmc || spl_mmc_get_mmc_devnum(mmc) != mmc_dev) {
err = spl_mmc_find_device(&mmc, bootdev->boot_device);
if (err)
return err;

2
drivers/gpio/Kconfig
View File

@ -70,7 +70,7 @@ config GPIO_HOG
config SPL_GPIO_HOG
bool "Enable GPIO hog support in SPL"
depends on SPL_GPIO_SUPPORT
depends on SPL_GPIO
help
Enable gpio hog support in SPL
The GPIO chip may contain GPIO hog definitions. GPIO hogging

1
drivers/pwm/Kconfig
View File

@ -12,6 +12,7 @@ config DM_PWM
config PWM_ASPEED
bool "Enable support for the Aspeed PWM"
depends on DM_PWM
select SYSCON
help
This PWM is found on Ast2600 SoCs. It supports a programmable period
and duty cycle. It provides 16 channels which can be independently

5
drivers/xen/events.c
View File

@ -23,7 +23,9 @@
#include <xen/events.h>
#include <xen/hvm.h>
#if CONFIG_IS_ENABLED(XEN_SERIAL)
extern u32 console_evtchn;
#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */
#define NR_EVS 1024
@ -51,8 +53,11 @@ void unbind_all_ports(void)
struct vcpu_info *vcpu_info = &s->vcpu_info[cpu];
for (i = 0; i < NR_EVS; i++) {
#if CONFIG_IS_ENABLED(XEN_SERIAL)
if (i == console_evtchn)
continue;
#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */
if (test_and_clear_bit(i, bound_ports)) {
printf("port %d still bound!\n", i);
unbind_evtchn(i);

9
tools/Makefile
View File

@ -198,7 +198,9 @@ hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
HOSTCFLAGS_mkexynosspl.o := -pedantic
HOSTCFLAGS_kwboot.o += -pthread
HOSTLDLIBS_kwboot += -pthread -ltinfo
HOSTLDLIBS_kwboot += -pthread
HOSTLDLIBS_kwboot += \
$(shell pkg-config --libs tinfo 2> /dev/null || echo "-ltinfo")
ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o
hostprogs-$(CONFIG_X86) += ifdtool
@ -242,7 +244,10 @@ hostprogs-$(CONFIG_MIPS) += mips-relocs
hostprogs-$(CONFIG_ASN1_COMPILER) += asn1_compiler
HOSTCFLAGS_asn1_compiler.o = -idirafter $(srctree)/include
HOSTLDLIBS_mkeficapsule += -lgnutls -luuid
HOSTCFLAGS_mkeficapsule.o += \
$(shell pkg-config --cflags gnutls uuid 2> /dev/null || echo "")
HOSTLDLIBS_mkeficapsule += \
$(shell pkg-config --libs gnutls uuid 2> /dev/null || echo "-lgnutls -luuid")
hostprogs-$(CONFIG_TOOLS_MKEFICAPSULE) += mkeficapsule
# We build some files with extra pedantic flags to try to minimize things

6
tools/sunxi_toc0.c
View File

@ -34,6 +34,12 @@
#define pr_warn(fmt, args...) fprintf(stderr, pr_fmt(fmt), "warning", ##args)
#define pr_info(fmt, args...) fprintf(stderr, pr_fmt(fmt), "info", ##args)
#if defined(LIBRESSL_VERSION_NUMBER)
#define RSA_get0_n(key) (key)->n
#define RSA_get0_e(key) (key)->e
#define RSA_get0_d(key) (key)->d
#endif
struct __packed toc0_key_item {
__le32 vendor_id;
__le32 key0_n_len;