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mx6: use CONFIG_MX6 instead of CONFIG_MX6Q
Use CONFIG_MX6 when the particular processor variant isn't important. Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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@ -42,14 +42,14 @@ static unsigned long gpio_ports[] = {
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[1] = GPIO2_BASE_ADDR,
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[2] = GPIO3_BASE_ADDR,
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#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
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defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
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defined(CONFIG_MX53) || defined(CONFIG_MX6)
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[3] = GPIO4_BASE_ADDR,
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#endif
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#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
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#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6)
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[4] = GPIO5_BASE_ADDR,
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[5] = GPIO6_BASE_ADDR,
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#endif
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#if defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
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#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
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[6] = GPIO7_BASE_ADDR,
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#endif
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};
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@ -55,7 +55,7 @@
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#define IPU_TPM_REG_BASE 0x01060000
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#define IPU_DC_TMPL_REG_BASE 0x01080000
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#define IPU_ISP_TBPR_REG_BASE 0x010C0000
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#elif defined(CONFIG_MX6Q)
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#elif defined(CONFIG_MX6)
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#define IPU_CPMEM_REG_BASE 0x00100000
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#define IPU_LUT_REG_BASE 0x00120000
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#define IPU_SRM_REG_BASE 0x00140000
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@ -22,6 +22,7 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MX6
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#define CONFIG_MX6Q
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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@ -17,6 +17,7 @@
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#ifndef __MX6QSABRE_COMMON_CONFIG_H
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#define __MX6QSABRE_COMMON_CONFIG_H
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#define CONFIG_MX6
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#define CONFIG_MX6Q
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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@ -22,6 +22,7 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MX6
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#define CONFIG_MX6Q
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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