mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-28 07:03:31 +08:00
arm: socfpga: Enable tiny printf and simple malloc in SPL
Enable both features to reduce the SPL size by 6 kiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
1254667689
commit
5bb4050df3
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_SR1500=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SOCFPGA=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
|
||||
|
@ -324,9 +324,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
|
||||
#define CONFIG_SPL_RAM_DEVICE
|
||||
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
|
||||
#define CONFIG_SPL_MAX_SIZE (64 * 1024)
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MALLOC_SIMPLE
|
||||
#endif
|
||||
|
||||
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
|
Loading…
Reference in New Issue
Block a user