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net: gem: Move gem to Kconfig
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
This commit is contained in:
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3cdb1450de
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@ -22,4 +22,5 @@ CONFIG_CMD_TIME=y
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CONFIG_CMD_TIMER=y
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CONFIG_OF_EMBED=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_ZYNQ_GEM=y
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# CONFIG_REGEX is not set
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@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_QSPI=y
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@ -9,3 +9,4 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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@ -15,4 +15,5 @@ CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_QSPI=y
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@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_QSPI=y
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@ -18,5 +18,6 @@ CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_SPI=y
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CONFIG_ZYNQ_QSPI=y
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@ -13,3 +13,4 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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@ -11,3 +11,4 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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@ -13,3 +13,4 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_ZYNQ_QSPI=y
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@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_PHYLIB=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_ZYNQ=y
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CONFIG_DEBUG_UART_BASE=0xe0001000
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@ -101,4 +101,10 @@ config PCH_GBE
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This MAC is present in Intel Platform Controller Hub EG20T. It
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supports 10/100/1000 Mbps operation.
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config ZYNQ_GEM
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depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP)
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bool "Xilinx Ethernet GEM"
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help
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This MAC is presetn in Xilinx Zynq and ZynqMP SoCs.
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endif # NETDEVICES
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@ -176,10 +176,8 @@
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#define CONFIG_SYS_MAXARGS 64
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/* Ethernet driver */
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#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \
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defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3)
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#if defined(CONFIG_ZYNQ_GEM)
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# define CONFIG_NET_MULTI
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# define CONFIG_ZYNQ_GEM
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# define CONFIG_MII
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# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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# define CONFIG_PHYLIB
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@ -15,9 +15,6 @@
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#ifndef __CONFIG_ZYNQMP_EP_H
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#define __CONFIG_ZYNQMP_EP_H
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
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#define CONFIG_ZYNQ_I2C0
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@ -46,8 +46,7 @@
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#define CONFIG_ZYNQ_GPIO
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/* Ethernet driver */
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#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
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# define CONFIG_ZYNQ_GEM
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#if defined(CONFIG_ZYNQ_GEM)
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# define CONFIG_MII
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# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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# define CONFIG_PHY_MARVELL
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@ -12,9 +12,6 @@
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#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024)
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_SDHCI0
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@ -12,9 +12,6 @@
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#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024)
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_SDHCI1
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@ -12,9 +12,6 @@
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#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024)
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_SDHCI0
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_NO_FLASH
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#if defined(CONFIG_ZC770_XM010)
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# define CONFIG_ZYNQ_GEM0
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# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
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# define CONFIG_ZYNQ_SDHCI0
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#elif defined(CONFIG_ZC770_XM011)
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@ -25,8 +23,6 @@
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# undef CONFIG_SYS_NO_FLASH
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#elif defined(CONFIG_ZC770_XM013)
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# define CONFIG_ZYNQ_GEM1
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# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7
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#endif
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@ -12,9 +12,6 @@
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#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_USB
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@ -13,9 +13,6 @@
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#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_SDHCI0
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