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arm: ARMv4 assembly compatibility
There is currently a problem that U-Boot can not work on ARMv4 because assembly imlementations of memcpy() and some other functions use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr" should be used instead). A working preprocessor-based solution to this problem is found in arch/arm/lib/relocate.S. Move it to the "ret" macro in arch/arm/include/asm/assembler.h and change all "bx lr" code to "ret lr" in functions that may run on ARMv4. Linux source code deals with this problem in the same manner. v1 -> v2: Comment update. Pointed out by Andre Przywara. Signed-off-by: Sergei Antonov <saproj@gmail.com> CC: Samuel Holland <samuel@sholland.org> CC: Ye Li <ye.li@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Andre Przywara <andre.przywara@arm.com> CC: Marek Vasut <marex@denx.de> CC: Sean Anderson <sean.anderson@seco.com> CC: Tom Rini <trini@konsulko.com>
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@ -58,16 +58,22 @@
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#endif
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#endif
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/*
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/*
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* We only support cores that support at least Thumb-1 and thus we use
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* Use 'bx lr' everywhere except ARMv4 (without 'T') where only 'mov pc, lr'
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* 'bx lr'
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* works
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*/
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*/
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.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
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.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
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.macro ret\c, reg
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.macro ret\c, reg
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/* ARMv4- don't know bx lr but the assembler fails to see that */
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#ifdef __ARM_ARCH_4__
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mov\c pc, \reg
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#else
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.ifeqs "\reg", "lr"
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.ifeqs "\reg", "lr"
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bx\c \reg
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bx\c \reg
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.else
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.else
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mov\c pc, \reg
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mov\c pc, \reg
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.endif
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.endif
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#endif
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.endm
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.endm
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.endr
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.endr
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@ -377,7 +377,7 @@ ENTRY(__gnu_thumb1_case_sqi)
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lsls r1, r1, #1
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lsls r1, r1, #1
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add lr, lr, r1
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add lr, lr, r1
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pop {r1}
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pop {r1}
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bx lr
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ret lr
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ENDPROC(__gnu_thumb1_case_sqi)
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ENDPROC(__gnu_thumb1_case_sqi)
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.popsection
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.popsection
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@ -391,7 +391,7 @@ ENTRY(__gnu_thumb1_case_uqi)
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lsls r1, r1, #1
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lsls r1, r1, #1
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add lr, lr, r1
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add lr, lr, r1
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pop {r1}
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pop {r1}
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bx lr
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ret lr
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ENDPROC(__gnu_thumb1_case_uqi)
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ENDPROC(__gnu_thumb1_case_uqi)
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.popsection
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.popsection
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@ -406,7 +406,7 @@ ENTRY(__gnu_thumb1_case_shi)
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lsls r1, r1, #1
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lsls r1, r1, #1
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add lr, lr, r1
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add lr, lr, r1
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pop {r0, r1}
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pop {r0, r1}
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bx lr
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ret lr
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ENDPROC(__gnu_thumb1_case_shi)
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ENDPROC(__gnu_thumb1_case_shi)
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.popsection
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.popsection
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@ -421,7 +421,7 @@ ENTRY(__gnu_thumb1_case_uhi)
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lsls r1, r1, #1
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lsls r1, r1, #1
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add lr, lr, r1
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add lr, lr, r1
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pop {r0, r1}
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pop {r0, r1}
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bx lr
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ret lr
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ENDPROC(__gnu_thumb1_case_uhi)
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ENDPROC(__gnu_thumb1_case_uhi)
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.popsection
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.popsection
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#endif
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#endif
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@ -59,7 +59,7 @@
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#endif
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#endif
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ENTRY(memcpy)
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ENTRY(memcpy)
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cmp r0, r1
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cmp r0, r1
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bxeq lr
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reteq lr
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enter r4, lr
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enter r4, lr
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@ -148,7 +148,7 @@ ENTRY(memcpy)
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str1b r0, ip, cs, abort=21f
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str1b r0, ip, cs, abort=21f
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exit r4, lr
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exit r4, lr
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bx lr
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ret lr
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9: rsb ip, ip, #4
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9: rsb ip, ip, #4
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cmp ip, #2
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cmp ip, #2
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@ -258,7 +258,7 @@ ENTRY(memcpy)
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.macro copy_abort_end
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.macro copy_abort_end
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ldmfd sp!, {r4, lr}
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ldmfd sp!, {r4, lr}
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bx lr
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ret lr
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.endm
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.endm
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ENDPROC(memcpy)
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ENDPROC(memcpy)
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@ -61,7 +61,7 @@ ENTRY(relocate_vectors)
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stmia r1!, {r2-r8,r10}
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stmia r1!, {r2-r8,r10}
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#endif
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#endif
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#endif
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#endif
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bx lr
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ret lr
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ENDPROC(relocate_vectors)
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ENDPROC(relocate_vectors)
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@ -127,13 +127,7 @@ relocate_done:
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
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#endif
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#endif
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/* ARMv4- don't know bx lr but the assembler fails to see that */
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ret lr
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#ifdef __ARM_ARCH_4__
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mov pc, lr
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#else
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bx lr
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#endif
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ENDPROC(relocate_code)
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ENDPROC(relocate_code)
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@ -17,7 +17,7 @@ ENTRY(setjmp)
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mov ip, sp
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mov ip, sp
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stm a1, {v1-v8, ip, lr}
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stm a1, {v1-v8, ip, lr}
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mov a1, #0
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mov a1, #0
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bx lr
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ret lr
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ENDPROC(setjmp)
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ENDPROC(setjmp)
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.popsection
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.popsection
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@ -31,6 +31,6 @@ ENTRY(longjmp)
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bne 1f
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bne 1f
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mov a1, #1
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mov a1, #1
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1:
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1:
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bx lr
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ret lr
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ENDPROC(longjmp)
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ENDPROC(longjmp)
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.popsection
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.popsection
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