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arm: ARMv4 assembly compatibility

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There is currently a problem that U-Boot can not work on ARMv4
because assembly imlementations of memcpy() and some other functions
use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
should be used instead).

A working preprocessor-based solution to this problem is found in
arch/arm/lib/relocate.S. Move it to the "ret" macro in
arch/arm/include/asm/assembler.h and change all "bx lr" code
to "ret lr" in functions that may run on ARMv4. Linux source code
deals with this problem in the same manner.

v1 -> v2:
Comment update. Pointed out by Andre Przywara.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
CC: Samuel Holland <samuel@sholland.org>
CC: Ye Li <ye.li@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Marek Vasut <marex@denx.de>
CC: Sean Anderson <sean.anderson@seco.com>
CC: Tom Rini <trini@konsulko.com>
This commit is contained in:
Sergei Antonov 2022-08-21 16:34:20 +03:00 committed by Tom Rini
parent dc0d17c26a
commit 583f1b2f10
5 changed files with 19 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/include/asm/assembler.h
View File

@ -58,16 +58,22 @@
#endif
/*
* We only support cores that support at least Thumb-1 and thus we use
* 'bx lr'
* Use 'bx lr' everywhere except ARMv4 (without 'T') where only 'mov pc, lr'
* works
*/
.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
.macro ret\c, reg
/* ARMv4- don't know bx lr but the assembler fails to see that */
#ifdef __ARM_ARCH_4__
mov\c pc, \reg
#else
.ifeqs "\reg", "lr"
bx\c \reg
.else
mov\c pc, \reg
.endif
#endif
.endm
.endr

8
arch/arm/lib/lib1funcs.S
View File

@ -377,7 +377,7 @@ ENTRY(__gnu_thumb1_case_sqi)
lsls r1, r1, #1
add lr, lr, r1
pop {r1}
bx lr
ret lr
ENDPROC(__gnu_thumb1_case_sqi)
.popsection
@ -391,7 +391,7 @@ ENTRY(__gnu_thumb1_case_uqi)
lsls r1, r1, #1
add lr, lr, r1
pop {r1}
bx lr
ret lr
ENDPROC(__gnu_thumb1_case_uqi)
.popsection
@ -406,7 +406,7 @@ ENTRY(__gnu_thumb1_case_shi)
lsls r1, r1, #1
add lr, lr, r1
pop {r0, r1}
bx lr
ret lr
ENDPROC(__gnu_thumb1_case_shi)
.popsection
@ -421,7 +421,7 @@ ENTRY(__gnu_thumb1_case_uhi)
lsls r1, r1, #1
add lr, lr, r1
pop {r0, r1}
bx lr
ret lr
ENDPROC(__gnu_thumb1_case_uhi)
.popsection
#endif

6
arch/arm/lib/memcpy.S
View File

@ -59,7 +59,7 @@
#endif
ENTRY(memcpy)
cmp r0, r1
bxeq lr
reteq lr
enter r4, lr
@ -148,7 +148,7 @@ ENTRY(memcpy)
str1b r0, ip, cs, abort=21f
exit r4, lr
bx lr
ret lr
9: rsb ip, ip, #4
cmp ip, #2
@ -258,7 +258,7 @@ ENTRY(memcpy)
.macro copy_abort_end
ldmfd sp!, {r4, lr}
bx lr
ret lr
.endm
ENDPROC(memcpy)

10
arch/arm/lib/relocate.S
View File

@ -61,7 +61,7 @@ ENTRY(relocate_vectors)
stmia r1!, {r2-r8,r10}
#endif
#endif
bx lr
ret lr
ENDPROC(relocate_vectors)
@ -127,13 +127,7 @@ relocate_done:
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
#endif
/* ARMv4- don't know bx lr but the assembler fails to see that */
#ifdef __ARM_ARCH_4__
mov pc, lr
#else
bx lr
#endif
ret lr
ENDPROC(relocate_code)

4
arch/arm/lib/setjmp.S
View File

@ -17,7 +17,7 @@ ENTRY(setjmp)
mov ip, sp
stm a1, {v1-v8, ip, lr}
mov a1, #0
bx lr
ret lr
ENDPROC(setjmp)
.popsection
@ -31,6 +31,6 @@ ENTRY(longjmp)
bne 1f
mov a1, #1
1:
bx lr
ret lr
ENDPROC(longjmp)
.popsection