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armv8: dts: ls1046a: Add the PCIe EP node
Add the PCIe EP node for ls1046a. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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@ -257,6 +257,17 @@
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0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie_ep@3400000 {
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compatible = "fsl,ls-pcie-ep";
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reg = <0x00 0x03400000 0x0 0x80000
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0x00 0x034c0000 0x0 0x40000
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0x40 0x00000000 0x8 0x00000000>;
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reg-names = "regs", "ctrl", "addr_space";
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num-ib-windows = <6>;
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num-ob-windows = <8>;
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big-endian;
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};
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pcie@3500000 {
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compatible = "fsl,ls-pcie", "snps,dw-pcie";
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reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
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@ -274,6 +285,17 @@
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0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie_ep@3500000 {
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compatible = "fsl,ls-pcie-ep";
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reg = <0x00 0x03500000 0x0 0x80000
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0x00 0x035c0000 0x0 0x40000
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0x48 0x00000000 0x8 0x00000000>;
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reg-names = "regs", "ctrl", "addr_space";
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num-ib-windows = <6>;
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num-ob-windows = <8>;
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big-endian;
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};
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pcie@3600000 {
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compatible = "fsl,ls-pcie", "snps,dw-pcie";
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reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
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@ -290,6 +312,17 @@
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0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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};
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pcie_ep@3600000 {
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compatible = "fsl,ls-pcie-ep";
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reg = <0x00 0x03600000 0x0 0x80000
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0x00 0x036c0000 0x0 0x40000
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0x50 0x00000000 0x8 0x00000000>;
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reg-names = "regs", "ctrl", "addr_space";
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num-ib-windows = <6>;
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num-ob-windows = <8>;
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big-endian;
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};
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sata: sata@3200000 {
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compatible = "fsl,ls1046a-ahci";
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reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
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