mirrors/u-boot
0
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-01-18 08:43:25 +08:00
Code Issues Packages Projects Releases Wiki Activity

miiphy: constify device name

Browse Source 
The driver name does not need to be writable, so constify it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This commit is contained in:
Mike Frysinger 2010-07-27 18:35:08 -04:00 committed by Ben Warren
parent 78b7a8ef8b
commit 5700bb6352
30 changed files with 107 additions and 106 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/cpu/arm920t/at91rm9200/ether.c
View File

@ -283,7 +283,7 @@ void eth_halt (void)
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
int at91rm9200_miiphy_read(char *devname, unsigned char addr,
int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
@ -292,7 +292,7 @@ int at91rm9200_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int at91rm9200_miiphy_write(char *devname, unsigned char addr,
int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);

4
arch/arm/cpu/ixp/npe/include/npe.h
View File

@ -82,9 +82,9 @@ struct npe {
/*
* prototypes...
*/
extern int npe_miiphy_read (char *devname, unsigned char addr,
extern int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
extern int npe_miiphy_write (char *devname, unsigned char addr,
extern int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* ifndef NPE_H */

4
arch/arm/cpu/ixp/npe/miiphy.c
View File

@ -100,7 +100,7 @@ int phy_setup_aneg (char *devname, unsigned char addr)
}
int npe_miiphy_read (char *devname, unsigned char addr,
int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
u16 val;
@ -112,7 +112,7 @@ int npe_miiphy_read (char *devname, unsigned char addr,
} /* phy_read */
int npe_miiphy_write (char *devname, unsigned char addr,
int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
ixEthAccMiiWriteRtn(addr, reg, value);

4
arch/m68k/include/asm/fec.h
View File

@ -357,9 +357,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear);
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
int mcffec_miiphy_read(char *devname, unsigned char addr,
int mcffec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int mcffec_miiphy_write(char *devname, unsigned char addr,
int mcffec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif

4
arch/mips/cpu/au1x00_eth.c
View File

@ -89,7 +89,7 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
int au1x00_miiphy_read(char *devname, unsigned char addr,
int au1x00_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
@ -122,7 +122,7 @@ int au1x00_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int au1x00_miiphy_write(char *devname, unsigned char addr,
int au1x00_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);

8
arch/powerpc/cpu/mpc8220/fec.c
View File

@ -34,8 +34,8 @@ typedef struct {
u8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data);
int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal);
int fec8220_miiphy_write (const char *devname, u8 phyAddr, u8 regAddr, u16 data);
/********************************************************************/
#ifdef DEBUG
@ -881,7 +881,7 @@ int mpc8220_fec_initialize (bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
@ -925,7 +925,7 @@ int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
}
/********************************************************************/
int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
int fec8220_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */

8
arch/powerpc/cpu/mpc8xx/fec.c
View File

@ -63,9 +63,9 @@ DECLARE_GLOBAL_DATA_PTR;
static int mii_discover_phy(struct eth_device *dev);
#endif
int fec8xx_miiphy_read(char *devname, unsigned char addr,
int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int fec8xx_miiphy_write(char *devname, unsigned char addr,
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static struct ether_fcc_info_s
@ -990,7 +990,7 @@ void mii_init (void)
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
int fec8xx_miiphy_read(char *devname, unsigned char addr,
int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
@ -1007,7 +1007,7 @@ int fec8xx_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int fec8xx_miiphy_write(char *devname, unsigned char addr,
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
short rdreg; /* register working value */

4
arch/powerpc/cpu/ppc4xx/miiphy.c
View File

@ -338,7 +338,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value)
return 0;
}
int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
unsigned long sta_reg;
@ -359,7 +359,7 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
/* write a phy reg and return the value with a rc */
/***********************************************************/
int emac4xx_miiphy_write (char *devname, unsigned char addr, unsigned char reg,
int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);

6
board/evb64260/eth.c
View File

@ -89,7 +89,7 @@ static const char ether_port_phy_addr[3]={4,5,6};
/* MII PHY access routines are common for all i/f, use gal_ent0 */
#define GT6426x_MII_DEVNAME "gal_enet0"
int gt6426x_miiphy_read(char *devname, unsigned char phy,
int gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val);
static inline unsigned short
@ -345,7 +345,7 @@ gt6426x_eth_disable(void *v)
MII utilities - write: write to an MII register via SMI
***************************************************************************/
int
gt6426x_miiphy_write(char *devname, unsigned char phy,
gt6426x_miiphy_write(const char *devname, unsigned char phy,
unsigned char reg, unsigned short data)
{
unsigned int temp= (reg<<21) | (phy<<16) | data;
@ -360,7 +360,7 @@ gt6426x_miiphy_write(char *devname, unsigned char phy,
MII utilities - read: read from an MII register via SMI
***************************************************************************/
int
gt6426x_miiphy_read(char *devname, unsigned char phy,
gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val)
{
unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;

8
board/prodrive/p3mx/mv_eth.c
View File

@ -99,9 +99,9 @@ int mv64460_eth_receive (struct eth_device *dev);
int mv64460_eth_xmit (struct eth_device *, volatile void *packet, int length);
int mv_miiphy_read(char *devname, unsigned char phy_addr,
int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value);
int mv_miiphy_write(char *devname, unsigned char phy_addr,
int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value);
int phy_setup_aneg (char *devname, unsigned char addr);
@ -2544,7 +2544,7 @@ static bool eth_port_read_smi_reg (ETH_PORT eth_port_num,
return true;
}
int mv_miiphy_read(char *devname, unsigned char phy_addr,
int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value)
{
unsigned int reg_value;
@ -2629,7 +2629,7 @@ static bool eth_port_write_smi_reg (ETH_PORT eth_port_num,
return true;
}
int mv_miiphy_write(char *devname, unsigned char phy_addr,
int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value)
{
unsigned int reg_value;

2
common/cmd_mii.c
View File

@ -299,7 +299,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
unsigned char addr, reg;
unsigned short data;
int rcode = 0;
char *devname;
const char *devname;
if (argc < 2)
return cmd_usage(cmdtp);

41
common/miiphyutil.c
View File

@ -46,10 +46,10 @@
struct mii_dev {
struct list_head link;
char *name;
int (*read) (char *devname, unsigned char addr,
const char *name;
int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int (*write) (char *devname, unsigned char addr,
int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
};
@ -60,7 +60,7 @@ static struct mii_dev *current_mii;
*
* Initialize global data. Need to be called before any other miiphy routine.
*/
void miiphy_init ()
void miiphy_init(void)
{
INIT_LIST_HEAD (&mii_devs);
current_mii = NULL;
@ -70,16 +70,17 @@ void miiphy_init ()
*
* Register read and write MII access routines for the device <name>.
*/
void miiphy_register (char *name,
int (*read) (char *devname, unsigned char addr,
void miiphy_register(const char *name,
int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
int (*write) (char *devname, unsigned char addr,
int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value))
{
struct list_head *entry;
struct mii_dev *new_dev;
struct mii_dev *miidev;
unsigned int name_len;
char *new_name;
/* check if we have unique name */
list_for_each (entry, &mii_devs) {
@ -107,9 +108,9 @@ void miiphy_register (char *name,
INIT_LIST_HEAD (&new_dev->link);
new_dev->read = read;
new_dev->write = write;
new_dev->name = (char *)(new_dev + 1);
strncpy (new_dev->name, name, name_len);
new_dev->name[name_len] = '\0';
new_dev->name = new_name = (char *)(new_dev + 1);
strncpy (new_name, name, name_len);
new_name[name_len] = '\0';
debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
new_dev->name, new_dev->read, new_dev->write);
@ -121,7 +122,7 @@ void miiphy_register (char *name,
current_mii = new_dev;
}
int miiphy_set_current_dev (char *devname)
int miiphy_set_current_dev(const char *devname)
{
struct list_head *entry;
struct mii_dev *dev;
@ -139,7 +140,7 @@ int miiphy_set_current_dev (char *devname)
return 1;
}
char *miiphy_get_current_dev ()
const char *miiphy_get_current_dev(void)
{
if (current_mii)
return current_mii->name;
@ -155,7 +156,7 @@ char *miiphy_get_current_dev ()
* Returns:
* 0 on success
*/
int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
struct list_head *entry;
@ -192,7 +193,7 @@ int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
* Returns:
* 0 on success
*/
int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
struct list_head *entry;
@ -252,7 +253,7 @@ void miiphy_listdev (void)
* Returns:
* 0 on success
*/
int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev)
{
unsigned int reg = 0;
@ -290,7 +291,7 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
* Returns:
* 0 on success
*/
int miiphy_reset (char *devname, unsigned char addr)
int miiphy_reset(const char *devname, unsigned char addr)
{
unsigned short reg;
int timeout = 500;
@ -332,7 +333,7 @@ int miiphy_reset (char *devname, unsigned char addr)
*
* Determine the ethernet speed (10/100/1000). Return 10 on error.
*/
int miiphy_speed (char *devname, unsigned char addr)
int miiphy_speed(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
@ -386,7 +387,7 @@ miiphy_read_failed:
*
* Determine full/half duplex. Return half on error.
*/
int miiphy_duplex (char *devname, unsigned char addr)
int miiphy_duplex(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
@ -446,7 +447,7 @@ miiphy_read_failed:
* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
* 1000BASE-T, or on error.
*/
int miiphy_is_1000base_x (char *devname, unsigned char addr)
int miiphy_is_1000base_x(const char *devname, unsigned char addr)
{
#if defined(CONFIG_PHY_GIGE)
u16 exsr;
@ -467,7 +468,7 @@ int miiphy_is_1000base_x (char *devname, unsigned char addr)
*
* Determine link status
*/
int miiphy_link (char *devname, unsigned char addr)
int miiphy_link(const char *devname, unsigned char addr)
{
unsigned short reg;

4
drivers/net/4xx_enet.c
View File

@ -305,9 +305,9 @@ static void mal_err (struct eth_device *dev, unsigned long isr,
static void emac_err (struct eth_device *dev, unsigned long isr);
extern int phy_setup_aneg (char *devname, unsigned char addr);
extern int emac4xx_miiphy_read (char *devname, unsigned char addr,
extern int emac4xx_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
extern int emac4xx_miiphy_write (char *devname, unsigned char addr,
extern int emac4xx_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int board_emac_count(void);

4
drivers/net/altera_tse.c
View File

@ -426,7 +426,7 @@ static int tse_mdio_write(struct altera_tse_priv *priv, unsigned int regnum,
/* MDIO access to phy */
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
static int altera_tse_miiphy_write(char *devname, unsigned char addr,
static int altera_tse_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;
@ -439,7 +439,7 @@ static int altera_tse_miiphy_write(char *devname, unsigned char addr,
return 0;
}
static int altera_tse_miiphy_read(char *devname, unsigned char addr,
static int altera_tse_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;

4
drivers/net/at91_emac.c
View File

@ -170,7 +170,7 @@ at91_emac_t *get_emacbase_by_name(char *devname)
return (at91_emac_t *) netdev->iobase;
}
int at91emac_mii_read(char *devname, unsigned char addr,
int at91emac_mii_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
at91_emac_t *emac;
@ -181,7 +181,7 @@ int at91emac_mii_read(char *devname, unsigned char addr,
}
int at91emac_mii_write(char *devname, unsigned char addr,
int at91emac_mii_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91_emac_t *emac;

4
drivers/net/bfin_mac.c
View File

@ -71,7 +71,7 @@ static int bfin_miiphy_wait(void)
return 0;
}
static int bfin_miiphy_read(char *devname, uchar addr, uchar reg, ushort *val)
static int bfin_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val)
{
if (bfin_miiphy_wait())
return 1;
@ -82,7 +82,7 @@ static int bfin_miiphy_read(char *devname, uchar addr, uchar reg, ushort *val)
return 0;
}
static int bfin_miiphy_write(char *devname, uchar addr, uchar reg, ushort val)
static int bfin_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val)
{
if (bfin_miiphy_wait())
return 1;

4
drivers/net/davinci_emac.c
View File

@ -252,12 +252,12 @@ static int gen_auto_negotiate(int phy_addr)
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
static int davinci_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
{
return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
}
static int davinci_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
{
return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
}

4
drivers/net/designware.c
View File

@ -451,7 +451,7 @@ static int configure_phy(struct eth_device *dev)
}
#if defined(CONFIG_MII)
static int dw_mii_read(char *devname, u8 addr, u8 reg, u16 *val)
static int dw_mii_read(const char *devname, u8 addr, u8 reg, u16 *val)
{
struct eth_device *dev;
@ -462,7 +462,7 @@ static int dw_mii_read(char *devname, u8 addr, u8 reg, u16 *val)
return 0;
}
static int dw_mii_write(char *devname, u8 addr, u8 reg, u16 val)
static int dw_mii_write(const char *devname, u8 addr, u8 reg, u16 val)
{
struct eth_device *dev;

4
drivers/net/eepro100.c
View File

@ -350,7 +350,7 @@ static struct eth_device* verify_phyaddr (char *devname, unsigned char addr)
return dev;
}
static int eepro100_miiphy_read (char *devname, unsigned char addr,
static int eepro100_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;
@ -367,7 +367,7 @@ static int eepro100_miiphy_read (char *devname, unsigned char addr,
return 0;
}
static int eepro100_miiphy_write (char *devname, unsigned char addr,
static int eepro100_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;

8
drivers/net/ep93xx_eth.c
View File

@ -44,9 +44,9 @@
#define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
/* ep93xx_miiphy ops forward declarations */
static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value);
static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value);
#if defined(EP93XX_MAC_DEBUG)
@ -555,7 +555,7 @@ eth_init_done:
/**
* Read a 16-bit value from an MII register.
*/
static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
@ -607,7 +607,7 @@ static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
/**
* Write a 16-bit value to an MII register.
*/
static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;

4
drivers/net/fec_mxc.c
View File

@ -62,7 +62,7 @@ struct fec_priv gfec = {
/*
* MII-interface related functions
*/
static int fec_miiphy_read(char *dev, uint8_t phyAddr, uint8_t regAddr,
static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t *retVal)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
@ -119,7 +119,7 @@ static void fec_mii_setspeed(struct fec_priv *fec)
debug("fec_init: mii_speed %#lx\n",
fec->eth->mii_speed);
}
static int fec_miiphy_write(char *dev, uint8_t phyAddr, uint8_t regAddr,
static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t data)
{
struct eth_device *edev = eth_get_dev_by_name(dev);

4
drivers/net/macb.c
View File

@ -167,7 +167,7 @@ static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
#if defined(CONFIG_CMD_MII)
int macb_miiphy_read(char *devname, u8 phy_adr, u8 reg, u16 *value)
int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);
@ -180,7 +180,7 @@ int macb_miiphy_read(char *devname, u8 phy_adr, u8 reg, u16 *value)
return 0;
}
int macb_miiphy_write(char *devname, u8 phy_adr, u8 reg, u16 value)
int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);

4
drivers/net/mcfmii.c
View File

@ -293,7 +293,7 @@ void __mii_init(void)
* Otherwise they hang in mii_send() !!! Sorry!
*/
int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
int mcffec_miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
short rdreg; /* register working value */
@ -312,7 +312,7 @@ int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
return 0;
}
int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
short rdreg; /* register working value */

8
drivers/net/mpc512x_fec.c
View File

@ -25,8 +25,8 @@ DECLARE_GLOBAL_DATA_PTR;
#error "CONFIG_MII has to be defined!"
#endif
int fec512x_miiphy_read(char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
int fec512x_miiphy_write(char *devname, u8 phyAddr, u8 regAddr, u16 data);
int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data);
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
static uchar rx_buff[FEC_BUFFER_SIZE];
@ -672,7 +672,7 @@ int mpc512x_fec_initialize (bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
@ -719,7 +719,7 @@ int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
}
/********************************************************************/
int fec512x_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;

8
drivers/net/mpc5xxx_fec.c
View File

@ -35,8 +35,8 @@ typedef struct {
uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal);
int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal);
int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis);
@ -941,7 +941,7 @@ int mpc5xxx_fec_initialize(bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
@ -983,7 +983,7 @@ int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * re
}
/********************************************************************/
int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */

4
drivers/net/mvgbe.c
View File

@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
*
* Returns 16bit phy register value, or 0xffff on error
*/
static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
@ -131,7 +131,7 @@ static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
* Returns 0 if write succeed, -EINVAL on bad parameters
* -ETIME on timeout
*/
static int smi_reg_write(char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);

4
drivers/net/ns7520_eth.c
View File

@ -761,7 +761,7 @@ enum mii_status {
/**
* Read a 16-bit value from an MII register.
*/
extern int ns7520_miiphy_read(char *devname, unsigned char const addr,
extern int ns7520_miiphy_read(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short *const value)
{
int ret = MII_STATUS_FAILURE;
@ -807,7 +807,7 @@ extern int ns7520_miiphy_read(char *devname, unsigned char const addr,
/**
* Write a 16-bit value to an MII register.
*/
extern int ns7520_miiphy_write(char *devname, unsigned char const addr,
extern int ns7520_miiphy_write(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
int ret = MII_STATUS_FAILURE;

8
drivers/net/tsec.c
View File

@ -60,9 +60,9 @@ static void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd);
static void adjust_link(struct eth_device *dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
static int tsec_miiphy_write(char *devname, unsigned char addr,
static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static int tsec_miiphy_read(char *devname, unsigned char addr,
static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
#endif
#ifdef CONFIG_MCAST_TFTP
@ -1919,7 +1919,7 @@ static void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd)
* Returns:
* 0 on success
*/
static int tsec_miiphy_read(char *devname, unsigned char addr,
static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
unsigned short ret;
@ -1942,7 +1942,7 @@ static int tsec_miiphy_read(char *devname, unsigned char addr,
* Returns:
* 0 on success
*/
static int tsec_miiphy_write(char *devname, unsigned char addr,
static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct tsec_private *priv = privlist[0];

6
drivers/qe/uec.c
View File

@ -603,7 +603,7 @@ static void phy_change(struct eth_device *dev)
* Returns:
* The index where the device is located, -1 on error
*/
static int uec_miiphy_find_dev_by_name(char *devname)
static int uec_miiphy_find_dev_by_name(const char *devname)
{
int i;
@ -628,7 +628,7 @@ static int uec_miiphy_find_dev_by_name(char *devname)
* Returns:
* 0 on success
*/
static int uec_miiphy_read(char *devname, unsigned char addr,
static int uec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
int devindex = 0;
@ -650,7 +650,7 @@ static int uec_miiphy_read(char *devname, unsigned char addr,
* Returns:
* 0 on success
*/
static int uec_miiphy_write(char *devname, unsigned char addr,
static int uec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
int devindex = 0;

30
include/miiphy.h
View File

@ -36,30 +36,30 @@
#include <net.h>
int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
int miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value);
int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
int miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value);
int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
int miiphy_info (const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev);
int miiphy_reset (char *devname, unsigned char addr);
int miiphy_speed (char *devname, unsigned char addr);
int miiphy_duplex (char *devname, unsigned char addr);
int miiphy_is_1000base_x (char *devname, unsigned char addr);
int miiphy_reset (const char *devname, unsigned char addr);
int miiphy_speed (const char *devname, unsigned char addr);
int miiphy_duplex (const char *devname, unsigned char addr);
int miiphy_is_1000base_x (const char *devname, unsigned char addr);
#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
int miiphy_link (char *devname, unsigned char addr);
int miiphy_link (const char *devname, unsigned char addr);
#endif
void miiphy_init (void);
void miiphy_register (char *devname,
int (*read) (char *devname, unsigned char addr,
void miiphy_register (const char *devname,
int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
int (*write) (char *devname, unsigned char addr,
int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value));
int miiphy_set_current_dev (char *devname);
char *miiphy_get_current_dev (void);
int miiphy_set_current_dev (const char *devname);
const char *miiphy_get_current_dev (void);
void miiphy_listdev (void);
@ -85,9 +85,9 @@ extern struct bb_miiphy_bus bb_miiphy_buses[];
extern int bb_miiphy_buses_num;
void bb_miiphy_init (void);
int bb_miiphy_read (char *devname, unsigned char addr,
int bb_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int bb_miiphy_write (char *devname, unsigned char addr,
int bb_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif