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net: ftgmac100: add MDIO bus and phylib support
Implement the MDIO bus read/write functions using the readl_poll_timeout() routine, initialize the bus and scan for the PHY. RGMII and RMII mode are supported. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Cédric Le Goater
Joe Hershberger
parent
591ffd98b0
commit
538e75d3fc
@ -17,6 +17,7 @@
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#include <net.h>
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#include <linux/io.h>
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#include <asm/dma-mapping.h>
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#include <linux/iopoll.h>
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#include "ftgmac100.h"
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@ -29,6 +30,16 @@
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/* PKTBUFSTX/PKTBUFSRX must both be power of 2 */
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#define PKTBUFSTX 4 /* must be power of 2 */
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/* Timeout for a mdio read/write operation */
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#define FTGMAC100_MDIO_TIMEOUT_USEC 10000
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/*
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* MDC clock cycle threshold
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*
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* 20us * 100 = 2ms > (1 / 2.5Mhz) * 0x34
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*/
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#define MDC_CYCTHR 0x34
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/**
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* struct ftgmac100_data - private data for the FTGMAC100 driver
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*
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@ -38,6 +49,10 @@
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* @tx_index: Transmit descriptor index in @txdes
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* @rx_index: Receive descriptor index in @rxdes
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* @phy_addr: The PHY interface address to use
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* @phydev: The PHY device backing the MAC
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* @bus: The mdio bus
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* @phy_mode: The mode of the PHY interface (rgmii, rmii, ...)
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* @max_speed: Maximum speed of Ethernet connection supported by MAC
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*/
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struct ftgmac100_data {
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struct ftgmac100 *iobase;
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@ -48,234 +63,110 @@ struct ftgmac100_data {
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struct ftgmac100_rxdes *rxdes;
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int tx_index;
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int rx_index;
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int phy_addr;
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u32 phy_addr;
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struct phy_device *phydev;
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struct mii_dev *bus;
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u32 phy_mode;
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u32 max_speed;
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};
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/*
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* struct mii_bus functions
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*/
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static int ftgmac100_mdiobus_read(struct ftgmac100_data *priv, int phy_addr,
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int regnum)
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{
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struct ftgmac100 *ftgmac100 = priv->iobase;
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int phycr;
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int i;
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phycr = readl(&ftgmac100->phycr);
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/* preserve MDC cycle threshold */
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phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
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phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr)
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| FTGMAC100_PHYCR_REGAD(regnum)
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| FTGMAC100_PHYCR_MIIRD;
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writel(phycr, &ftgmac100->phycr);
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for (i = 0; i < 10; i++) {
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phycr = readl(&ftgmac100->phycr);
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if ((phycr & FTGMAC100_PHYCR_MIIRD) == 0) {
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int data;
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data = readl(&ftgmac100->phydata);
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return FTGMAC100_PHYDATA_MIIRDATA(data);
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}
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mdelay(10);
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}
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debug("mdio read timed out\n");
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return -1;
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}
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static int ftgmac100_mdiobus_write(struct ftgmac100_data *priv, int phy_addr,
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int regnum, u16 value)
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static int ftgmac100_mdio_read(struct mii_dev *bus, int phy_addr, int dev_addr,
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int reg_addr)
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{
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struct ftgmac100_data *priv = bus->priv;
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struct ftgmac100 *ftgmac100 = priv->iobase;
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int phycr;
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int data;
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int i;
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int ret;
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phycr = readl(&ftgmac100->phycr);
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phycr = FTGMAC100_PHYCR_MDC_CYCTHR(MDC_CYCTHR) |
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FTGMAC100_PHYCR_PHYAD(phy_addr) |
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FTGMAC100_PHYCR_REGAD(reg_addr) |
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FTGMAC100_PHYCR_MIIRD;
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writel(phycr, &ftgmac100->phycr);
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/* preserve MDC cycle threshold */
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phycr &= FTGMAC100_PHYCR_MDC_CYCTHR_MASK;
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ret = readl_poll_timeout(&ftgmac100->phycr, phycr,
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!(phycr & FTGMAC100_PHYCR_MIIRD),
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FTGMAC100_MDIO_TIMEOUT_USEC);
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if (ret) {
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pr_err("%s: mdio read failed (phy:%d reg:%x)\n",
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priv->phydev->dev->name, phy_addr, reg_addr);
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return ret;
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}
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phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr)
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| FTGMAC100_PHYCR_REGAD(regnum)
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| FTGMAC100_PHYCR_MIIWR;
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data = readl(&ftgmac100->phydata);
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return FTGMAC100_PHYDATA_MIIRDATA(data);
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}
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static int ftgmac100_mdio_write(struct mii_dev *bus, int phy_addr, int dev_addr,
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int reg_addr, u16 value)
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{
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struct ftgmac100_data *priv = bus->priv;
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struct ftgmac100 *ftgmac100 = priv->iobase;
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int phycr;
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int data;
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int ret;
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phycr = FTGMAC100_PHYCR_MDC_CYCTHR(MDC_CYCTHR) |
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FTGMAC100_PHYCR_PHYAD(phy_addr) |
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FTGMAC100_PHYCR_REGAD(reg_addr) |
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FTGMAC100_PHYCR_MIIWR;
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data = FTGMAC100_PHYDATA_MIIWDATA(value);
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writel(data, &ftgmac100->phydata);
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writel(phycr, &ftgmac100->phycr);
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for (i = 0; i < 10; i++) {
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phycr = readl(&ftgmac100->phycr);
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if ((phycr & FTGMAC100_PHYCR_MIIWR) == 0) {
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debug("(phycr & FTGMAC100_PHYCR_MIIWR) == 0: " \
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"phy_addr: %x\n", phy_addr);
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return 0;
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}
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mdelay(1);
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ret = readl_poll_timeout(&ftgmac100->phycr, phycr,
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!(phycr & FTGMAC100_PHYCR_MIIWR),
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FTGMAC100_MDIO_TIMEOUT_USEC);
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if (ret) {
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pr_err("%s: mdio write failed (phy:%d reg:%x)\n",
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priv->phydev->dev->name, phy_addr, reg_addr);
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}
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debug("mdio write timed out\n");
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return -1;
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return ret;
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}
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int ftgmac100_phy_read(struct ftgmac100_data *priv, int addr, int reg,
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u16 *value)
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static int ftgmac100_mdio_init(struct udevice *dev)
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{
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*value = ftgmac100_mdiobus_read(priv, addr, reg);
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struct ftgmac100_data *priv = dev_get_priv(dev);
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struct mii_dev *bus;
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int ret;
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if (*value == -1)
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return -1;
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bus = mdio_alloc();
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if (!bus)
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return -ENOMEM;
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bus->read = ftgmac100_mdio_read;
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bus->write = ftgmac100_mdio_write;
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bus->priv = priv;
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ret = mdio_register_seq(bus, dev->seq);
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if (ret) {
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free(bus);
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return ret;
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}
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priv->bus = bus;
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return 0;
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}
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int ftgmac100_phy_write(struct ftgmac100_data *priv, int addr, int reg,
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u16 value)
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{
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if (ftgmac100_mdiobus_write(priv, addr, reg, value) == -1)
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return -1;
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return 0;
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}
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static int ftgmac100_phy_reset(struct ftgmac100_data *priv, struct udevice *dev)
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{
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int i;
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u16 status, adv;
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adv = ADVERTISE_CSMA | ADVERTISE_ALL;
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ftgmac100_phy_write(priv, priv->phy_addr, MII_ADVERTISE, adv);
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printf("%s: Starting autonegotiation...\n", dev->name);
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ftgmac100_phy_write(priv, priv->phy_addr,
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MII_BMCR, (BMCR_ANENABLE | BMCR_ANRESTART));
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for (i = 0; i < 100000 / 100; i++) {
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ftgmac100_phy_read(priv, priv->phy_addr, MII_BMSR, &status);
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if (status & BMSR_ANEGCOMPLETE)
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break;
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mdelay(1);
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}
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if (status & BMSR_ANEGCOMPLETE) {
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printf("%s: Autonegotiation complete\n", dev->name);
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} else {
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printf("%s: Autonegotiation timed out (status=0x%04x)\n",
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dev->name, status);
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return 0;
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}
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return 1;
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}
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static int ftgmac100_phy_init(struct ftgmac100_data *priv, struct udevice *dev)
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{
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int phy_addr;
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u16 phy_id, status, adv, lpa, stat_ge;
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int media, speed, duplex;
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int i;
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/* Check if the PHY is up to snuff... */
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for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
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ftgmac100_phy_read(priv, phy_addr, MII_PHYSID1, &phy_id);
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/*
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* When it is unable to found PHY,
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* the interface usually return 0xffff or 0x0000
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*/
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if (phy_id != 0xffff && phy_id != 0x0) {
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printf("%s: found PHY at 0x%02x\n",
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dev->name, phy_addr);
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priv->phy_addr = phy_addr;
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break;
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}
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}
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if (phy_id == 0xffff || phy_id == 0x0) {
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printf("%s: no PHY present\n", dev->name);
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return 0;
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}
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ftgmac100_phy_read(priv, priv->phy_addr, MII_BMSR, &status);
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if (!(status & BMSR_LSTATUS)) {
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/* Try to re-negotiate if we don't have link already. */
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ftgmac100_phy_reset(priv, dev);
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for (i = 0; i < 100000 / 100; i++) {
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ftgmac100_phy_read(priv, priv->phy_addr,
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MII_BMSR, &status);
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if (status & BMSR_LSTATUS)
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break;
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udelay(100);
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}
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}
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if (!(status & BMSR_LSTATUS)) {
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printf("%s: link down\n", dev->name);
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return 0;
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}
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#ifdef CONFIG_FTGMAC100_EGIGA
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/* 1000 Base-T Status Register */
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ftgmac100_phy_read(dev, priv->phy_addr,
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MII_STAT1000, &stat_ge);
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speed = (stat_ge & (LPA_1000FULL | LPA_1000HALF)
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? 1 : 0);
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duplex = ((stat_ge & LPA_1000FULL)
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? 1 : 0);
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if (speed) { /* Speed is 1000 */
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printf("%s: link up, 1000bps %s-duplex\n",
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dev->name, duplex ? "full" : "half");
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return 0;
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}
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#endif
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ftgmac100_phy_read(priv, priv->phy_addr, MII_ADVERTISE, &adv);
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ftgmac100_phy_read(priv, priv->phy_addr, MII_LPA, &lpa);
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media = mii_nway_result(lpa & adv);
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speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 1 : 0);
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duplex = (media & ADVERTISE_FULL) ? 1 : 0;
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printf("%s: link up, %sMbps %s-duplex\n",
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dev->name, speed ? "100" : "10", duplex ? "full" : "half");
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return 1;
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}
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static int ftgmac100_update_link_speed(struct ftgmac100_data *priv)
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static int ftgmac100_phy_adjust_link(struct ftgmac100_data *priv)
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{
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struct ftgmac100 *ftgmac100 = priv->iobase;
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unsigned short stat_fe;
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unsigned short stat_ge;
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unsigned int maccr;
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struct phy_device *phydev = priv->phydev;
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u32 maccr;
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#ifdef CONFIG_FTGMAC100_EGIGA
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/* 1000 Base-T Status Register */
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ftgmac100_phy_read(priv, priv->phy_addr, MII_STAT1000, &stat_ge);
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#endif
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ftgmac100_phy_read(priv, priv->phy_addr, MII_BMSR, &stat_fe);
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if (!(stat_fe & BMSR_LSTATUS)) /* link status up? */
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return 0;
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if (!phydev->link) {
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dev_err(phydev->dev, "No link\n");
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return -EREMOTEIO;
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}
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/* read MAC control register and clear related bits */
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maccr = readl(&ftgmac100->maccr) &
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@ -283,43 +174,42 @@ static int ftgmac100_update_link_speed(struct ftgmac100_data *priv)
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FTGMAC100_MACCR_FAST_MODE |
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FTGMAC100_MACCR_FULLDUP);
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#ifdef CONFIG_FTGMAC100_EGIGA
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if (stat_ge & LPA_1000FULL) {
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/* set gmac for 1000BaseTX and Full Duplex */
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maccr |= FTGMAC100_MACCR_GIGA_MODE | FTGMAC100_MACCR_FULLDUP;
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}
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if (stat_ge & LPA_1000HALF) {
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/* set gmac for 1000BaseTX and Half Duplex */
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if (phy_interface_is_rgmii(phydev) && phydev->speed == 1000)
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maccr |= FTGMAC100_MACCR_GIGA_MODE;
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}
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#endif
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if (stat_fe & BMSR_100FULL) {
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/* set MII for 100BaseTX and Full Duplex */
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maccr |= FTGMAC100_MACCR_FAST_MODE | FTGMAC100_MACCR_FULLDUP;
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}
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if (stat_fe & BMSR_10FULL) {
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/* set MII for 10BaseT and Full Duplex */
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maccr |= FTGMAC100_MACCR_FULLDUP;
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}
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if (stat_fe & BMSR_100HALF) {
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/* set MII for 100BaseTX and Half Duplex */
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if (phydev->speed == 100)
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maccr |= FTGMAC100_MACCR_FAST_MODE;
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}
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if (stat_fe & BMSR_10HALF) {
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/* set MII for 10BaseT and Half Duplex */
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/* we have already clear these bits, do nothing */
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;
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}
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if (phydev->duplex)
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maccr |= FTGMAC100_MACCR_FULLDUP;
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/* update MII config into maccr */
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writel(maccr, &ftgmac100->maccr);
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return 1;
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return 0;
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}
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static int ftgmac100_phy_init(struct udevice *dev)
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{
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struct ftgmac100_data *priv = dev_get_priv(dev);
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struct phy_device *phydev;
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int ret;
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phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode);
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if (!phydev)
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return -ENODEV;
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phydev->supported &= PHY_GBIT_FEATURES;
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if (priv->max_speed) {
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ret = phy_set_supported(phydev, priv->max_speed);
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if (ret)
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return ret;
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}
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phydev->advertising = phydev->supported;
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priv->phydev = phydev;
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phy_config(phydev);
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return 0;
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}
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/*
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@ -366,6 +256,8 @@ static void ftgmac100_stop(struct udevice *dev)
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debug("%s()\n", __func__);
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writel(0, &ftgmac100->maccr);
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phy_shutdown(priv->phydev);
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}
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static int ftgmac100_start(struct udevice *dev)
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@ -373,10 +265,12 @@ static int ftgmac100_start(struct udevice *dev)
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struct eth_pdata *plat = dev_get_platdata(dev);
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struct ftgmac100_data *priv = dev_get_priv(dev);
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struct ftgmac100 *ftgmac100 = priv->iobase;
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struct phy_device *phydev = priv->phydev;
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struct ftgmac100_txdes *txdes;
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struct ftgmac100_rxdes *rxdes;
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unsigned int maccr;
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void *buf;
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int ret;
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int i;
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debug("%s()\n", __func__);
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@ -462,11 +356,21 @@ static int ftgmac100_start(struct udevice *dev)
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writel(maccr, &ftgmac100->maccr);
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if (!ftgmac100_phy_init(priv, dev)) {
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if (!ftgmac100_update_link_speed(priv))
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return -1;
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ret = phy_startup(phydev);
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if (ret) {
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dev_err(phydev->dev, "Could not start PHY\n");
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return ret;
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}
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ret = ftgmac100_phy_adjust_link(priv);
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if (ret) {
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dev_err(phydev->dev, "Could not adjust link\n");
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return ret;
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}
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printf("%s: link up, %d Mbps %s-duplex mac:%pM\n", phydev->dev->name,
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phydev->speed, phydev->duplex ? "full" : "half", plat->enetaddr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -574,8 +478,20 @@ static int ftgmac100_write_hwaddr(struct udevice *dev)
|
||||
static int ftgmac100_ofdata_to_platdata(struct udevice *dev)
|
||||
{
|
||||
struct eth_pdata *pdata = dev_get_platdata(dev);
|
||||
const char *phy_mode;
|
||||
|
||||
pdata->iobase = devfdt_get_addr(dev);
|
||||
pdata->phy_interface = -1;
|
||||
phy_mode = dev_read_string(dev, "phy-mode");
|
||||
if (phy_mode)
|
||||
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
|
||||
if (pdata->phy_interface == -1) {
|
||||
dev_err(dev, "Invalid PHY interface '%s'\n", phy_mode);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -583,13 +499,37 @@ static int ftgmac100_probe(struct udevice *dev)
|
||||
{
|
||||
struct eth_pdata *pdata = dev_get_platdata(dev);
|
||||
struct ftgmac100_data *priv = dev_get_priv(dev);
|
||||
int ret;
|
||||
|
||||
priv->iobase = (struct ftgmac100 *)pdata->iobase;
|
||||
return 0;
|
||||
priv->phy_mode = pdata->phy_interface;
|
||||
priv->max_speed = pdata->max_speed;
|
||||
priv->phy_addr = 0;
|
||||
|
||||
ret = ftgmac100_mdio_init(dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = ftgmac100_phy_init(dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to initialize PHY: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ftgmac100_remove(struct udevice *dev)
|
||||
{
|
||||
struct ftgmac100_data *priv = dev_get_priv(dev);
|
||||
|
||||
free(priv->phydev);
|
||||
mdio_unregister(priv->bus);
|
||||
mdio_free(priv->bus);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user