mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-30 08:03:32 +08:00
powerpc: Remove warm reset entry point
No boards utilize the warm reset entry point, so remove it. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
parent
3792d7436e
commit
52ebd9c1e5
@ -94,17 +94,7 @@ version_string:
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. = EXC_OFF_SYS_RESET
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.globl _start
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
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b boot_cold
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sync
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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sync
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/* the boot code is located below the exception table */
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@ -188,7 +178,6 @@ _end_of_vectors:
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. = 0x2000
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boot_cold:
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boot_warm:
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/* disable everything */
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li r0, 0
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mtspr HID0, r0
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@ -288,14 +277,11 @@ in_flash:
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bl cpu_init_f
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sync
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mr r3, r21
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/* r3: BOOTFLAG */
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/* run 1st part of board init code (from Flash) */
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bl board_init_f
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sync
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/* NOTREACHED */
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/* NOTREACHED - board_init_f() does not return */
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.globl invalidate_bats
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invalidate_bats:
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@ -100,7 +100,6 @@ version_string:
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.globl _start
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/* Start from here after reset/power on */
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
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b boot_cold
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.globl _start_of_vectors
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@ -260,8 +259,6 @@ in_flash:
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/* run low-level CPU init code (in Flash) */
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bl cpu_init_f
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/* r3: BOOTFLAG */
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mr r3, r21
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/* run 1st part of board init code (in Flash) */
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bl board_init_f
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@ -91,18 +91,6 @@ _start:
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li r4, CONFIG_SYS_ISB /* Set ISB bit */
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or r3, r3, r4
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mtspr 638, r3
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x20
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold:
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boot_warm:
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/* Initialize machine status; enable machine check interrupt */
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/*----------------------------------------------------------------------*/
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@ -188,10 +176,10 @@ in_flash:
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/* r3: IMMR */
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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mr r3, r21
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/* r3: BOOTFLAG */
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bl board_init_f /* run 1st part of board init code (from Flash) */
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/* NOTREACHED - board_init_f() does not return */
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.globl _start_of_vectors
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_start_of_vectors:
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@ -89,19 +89,6 @@ version_string:
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. = EXC_OFF_SYS_RESET
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.globl _start
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On */
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nop
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold:
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boot_warm:
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mfmsr r5 /* save msr contents */
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/* Move CSBoot and adjust instruction pointer */
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@ -175,10 +162,10 @@ lowboot_reentry:
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/* r3: IMMR */
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bl cpu_init_f /* run low-level CPU init code (in Flash)*/
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mr r3, r21
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/* r3: BOOTFLAG */
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bl board_init_f /* run 1st part of board init code (in Flash)*/
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/* NOTREACHED - board_init_f() does not return */
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/*
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* Vector Table
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*/
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@ -88,19 +88,6 @@ version_string:
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. = EXC_OFF_SYS_RESET
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.globl _start
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On */
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nop
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold:
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boot_warm:
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mfmsr r5 /* save msr contents */
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/* replace default MBAR base address from 0x80000000
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@ -144,10 +131,10 @@ boot_warm:
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/* r3: IMMR */
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bl cpu_init_f /* run low-level CPU init code (in Flash)*/
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mr r3, r21
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/* r3: BOOTFLAG */
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bl board_init_f /* run 1st part of board init code (in Flash)*/
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/* NOTREACHED - board_init_f() does not return */
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/*
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* Vector Table
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*/
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@ -97,19 +97,6 @@ version_string:
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. = EXC_OFF_SYS_RESET
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.globl _start
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold:
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boot_warm:
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/* Initialize machine status; enable machine check interrupt */
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/*----------------------------------------------------------------------*/
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li r3, MSR_KERNEL /* Set FP, ME, RI flags */
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@ -198,10 +185,10 @@ in_flash:
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/* r3: IMMR */
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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mr r3, r21
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/* r3: BOOTFLAG */
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bl board_init_f /* run 1st part of board init code (from Flash) */
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/* NOTREACHED - board_init_f() does not return */
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.globl _start_of_vectors
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_start_of_vectors:
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@ -161,18 +161,6 @@ _hrcw_table:
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.globl _start
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/
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nop
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold:
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#if defined(CONFIG_MPC8260ADS) && defined(CONFIG_SYS_DEFAULT_IMMR)
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lis r3, CONFIG_SYS_DEFAULT_IMMR@h
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nop
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@ -185,7 +173,7 @@ boot_cold:
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stw r4, 0(r3)
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nop
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#endif /* CONFIG_MPC8260ADS && CONFIG_SYS_DEFAULT_IMMR */
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boot_warm:
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mfmsr r5 /* save msr contents */
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#if defined(CONFIG_COGENT)
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@ -254,10 +242,10 @@ in_flash:
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bl init_debug /* set up debugging stuff */
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#endif
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mr r3, r21
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/* r3: BOOTFLAG */
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bl board_init_f /* run 1st part of board init code (in Flash)*/
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/* NOTREACHED - board_init_f() does not return */
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/*
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* Vector Table
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*/
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@ -183,22 +183,9 @@ ppcDWload:
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.globl _start
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_start: /* time t 0 */
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH*/
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nop
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold: /* time t 3 */
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lis r4, CONFIG_DEFAULT_IMMR@h
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nop
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boot_warm: /* time t 5 */
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mfmsr r5 /* save msr contents */
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/* 83xx manuals prescribe a specific sequence for updating IMMRBAR. */
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@ -302,11 +289,11 @@ in_flash:
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/* run low-level CPU init code (in Flash)*/
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bl cpu_init_f
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/* r3: BOOTFLAG */
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mr r3, r21
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/* run 1st part of board init code (in Flash)*/
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bl board_init_f
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/* NOTREACHED - board_init_f() does not return */
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#ifndef CONFIG_NAND_SPL
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/*
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* Vector Table
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@ -432,6 +432,8 @@ _start_cont:
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bl board_init_f
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isync
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/* NOTREACHED - board_init_f() does not return */
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#ifndef CONFIG_NAND_SPL
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. = EXC_OFF_SYS_RESET
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.globl _start_of_vectors
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@ -83,17 +83,7 @@ version_string:
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. = EXC_OFF_SYS_RESET
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.globl _start
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_start:
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
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b boot_cold
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sync
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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sync
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/* the boot code is located below the exception table */
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@ -166,7 +156,6 @@ _end_of_vectors:
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. = 0x2000
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boot_cold:
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boot_warm:
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/*
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* NOTE: Only Cpu 0 will ever come here. Other cores go to an
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* address specified by the BPTR
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@ -303,14 +292,12 @@ diag_done:
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#endif
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/* bl l2cache_enable */
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mr r3, r21
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/* r3: BOOTFLAG */
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/* run 1st part of board init code (from Flash) */
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bl board_init_f
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sync
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/* NOTREACHED */
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/* NOTREACHED - board_init_f() does not return */
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.globl invalidate_bats
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invalidate_bats:
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@ -96,18 +96,6 @@ version_string:
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_start:
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lis r3, CONFIG_SYS_IMMR@h /* position IMMR */
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mtspr 638, r3
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li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
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b boot_cold
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. = EXC_OFF_SYS_RESET + 0x10
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.globl _start_warm
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_start_warm:
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li r21, BOOTFLAG_WARM /* Software reboot */
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b boot_warm
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boot_cold:
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boot_warm:
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/* Initialize machine status; enable machine check interrupt */
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/*----------------------------------------------------------------------*/
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@ -202,10 +190,10 @@ in_flash:
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/* r3: IMMR */
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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mr r3, r21
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/* r3: BOOTFLAG */
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bl board_init_f /* run 1st part of board init code (from Flash) */
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/* NOTREACHED - board_init_f() does not return */
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.globl _start_of_vectors
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_start_of_vectors:
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@ -261,6 +261,7 @@
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GET_GOT
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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bl board_init_f
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/* NOTREACHED - board_init_f() does not return */
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#endif
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#if defined(CONFIG_SYS_RAMBOOT)
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@ -803,6 +804,7 @@ _start:
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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bl board_init_f
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/* NOTREACHED - board_init_f() does not return */
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#endif
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#endif /* CONFIG_440 */
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@ -911,6 +913,7 @@ _start:
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GET_GOT /* initialize GOT access */
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bl board_init_f /* run first part of init code (from Flash) */
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/* NOTREACHED - board_init_f() does not return */
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#endif /* CONFIG_IOP480 */
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@ -1180,8 +1183,9 @@ _start:
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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/* NEVER RETURNS! */
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bl board_init_f /* run first part of init code (from Flash) */
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/* NOTREACHED - board_init_f() does not return */
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#endif /* CONFIG_NAND_SPL */
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#endif /* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */
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