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Powerpc/esdhc: Add simple description of esdhc register
Add some descriptions for esdhc register for easily using. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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@ -24,43 +24,43 @@
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DECLARE_GLOBAL_DATA_PTR;
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struct fsl_esdhc {
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uint dsaddr;
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uint blkattr;
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uint cmdarg;
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uint xfertyp;
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uint cmdrsp0;
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uint cmdrsp1;
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uint cmdrsp2;
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uint cmdrsp3;
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uint datport;
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uint prsstat;
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uint proctl;
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uint sysctl;
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uint irqstat;
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uint irqstaten;
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uint irqsigen;
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uint autoc12err;
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uint hostcapblt;
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uint wml;
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uint mixctrl;
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char reserved1[4];
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uint fevt;
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uint admaes;
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uint adsaddr;
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char reserved2[160];
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uint hostver;
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char reserved3[4];
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uint dmaerraddr;
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char reserved4[4];
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uint dmaerrattr;
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char reserved5[4];
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uint hostcapblt2;
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char reserved6[8];
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uint tcr;
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char reserved7[28];
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uint sddirctl;
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char reserved8[712];
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uint scr;
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uint dsaddr; /* SDMA system address register */
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uint blkattr; /* Block attributes register */
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uint cmdarg; /* Command argument register */
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uint xfertyp; /* Transfer type register */
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uint cmdrsp0; /* Command response 0 register */
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uint cmdrsp1; /* Command response 1 register */
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uint cmdrsp2; /* Command response 2 register */
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uint cmdrsp3; /* Command response 3 register */
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uint datport; /* Buffer data port register */
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uint prsstat; /* Present state register */
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uint proctl; /* Protocol control register */
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uint sysctl; /* System Control Register */
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uint irqstat; /* Interrupt status register */
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uint irqstaten; /* Interrupt status enable register */
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uint irqsigen; /* Interrupt signal enable register */
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uint autoc12err; /* Auto CMD error status register */
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uint hostcapblt; /* Host controller capabilities register */
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uint wml; /* Watermark level register */
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uint mixctrl; /* For USDHC */
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char reserved1[4]; /* reserved */
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uint fevt; /* Force event register */
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uint admaes; /* ADMA error status register */
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uint adsaddr; /* ADMA system address register */
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char reserved2[160]; /* reserved */
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uint hostver; /* Host controller version register */
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char reserved3[4]; /* reserved */
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uint dmaerraddr; /* DMA error address register */
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char reserved4[4]; /* reserved */
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uint dmaerrattr; /* DMA error attribute register */
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char reserved5[4]; /* reserved */
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uint hostcapblt2; /* Host controller capabilities register 2 */
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char reserved6[8]; /* reserved */
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uint tcr; /* Tuning control register */
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char reserved7[28]; /* reserved */
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uint sddirctl; /* SD direction control register */
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char reserved8[712]; /* reserved */
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uint scr; /* eSDHC control register */
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};
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/* Return the XFERTYP flags for a given command and data packet */
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