mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 13:14:19 +08:00
imx: imx8ulp: cgc: Switch to NICLPAV to FRO192 before PLL4 init
When reset with dual boot mode, the LPAV domain won't power down due to its master is not assigned to APD. So the NICLPAV keeps the last setting to use PLL4PFD1. So before SPL initialize the PLL4, we need to switch NICLPAV to FRO192, otherwise system will hang. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
parent
4ab38f6822
commit
509b8e7ba1
@ -189,6 +189,14 @@ void cgc1_pll3_init(ulong freq)
|
||||
|
||||
void cgc2_pll4_init(bool pll4_reset)
|
||||
{
|
||||
/* Check the NICLPAV first to ensure not from PLL4 PFD1 clock */
|
||||
if ((readl(&cgc2_regs->niclpavclk) & GENMASK(29, 28)) == BIT(28)) {
|
||||
/* switch to FRO 192 first */
|
||||
clrbits_le32(&cgc2_regs->niclpavclk, GENMASK(29, 28));
|
||||
while (!(readl(&cgc2_regs->niclpavclk) & BIT(27)))
|
||||
;
|
||||
}
|
||||
|
||||
/* Disable PFD DIV and clear DIV */
|
||||
writel(0x80808080, &cgc2_regs->pll4div_pfd0);
|
||||
writel(0x80808080, &cgc2_regs->pll4div_pfd1);
|
||||
|
Loading…
Reference in New Issue
Block a user