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arm, davinci: add header files for dm365
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Heiko Schocher
Albert ARIBAUD
parent
68bb829500
commit
4e28ede208
50
arch/arm/include/asm/arch-davinci/aintc_defs.h
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50
arch/arm/include/asm/arch-davinci/aintc_defs.h
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@ -0,0 +1,50 @@
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/*
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* Copyright (C) 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _DV_AINTC_DEFS_H_
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#define _DV_AINTC_DEFS_H_
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struct dv_aintc_regs {
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unsigned int fiq0; /* 0x00 */
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unsigned int fiq1; /* 0x04 */
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unsigned int irq0; /* 0x08 */
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unsigned int irq1; /* 0x0c */
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unsigned int fiqentry; /* 0x10 */
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unsigned int irqentry; /* 0x14 */
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unsigned int eint0; /* 0x18 */
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unsigned int eint1; /* 0x1c */
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unsigned int intctl; /* 0x20 */
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unsigned int eabase; /* 0x24 */
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unsigned char rsvd0[8]; /* 0x28 */
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unsigned int intpri0; /* 0x30 */
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unsigned int intpri1; /* 0x34 */
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unsigned int intpri2; /* 0x38 */
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unsigned int intpri3; /* 0x3c */
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unsigned int intpri4; /* 0x40 */
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unsigned int intpri5; /* 0x44 */
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unsigned int intpri6; /* 0x48 */
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unsigned int intpri7; /* 0x4c */
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};
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#define dv_aintc_regs ((struct dv_aintc_regs *)DAVINCI_ARM_INTC_BASE)
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#endif /* _DV_AINTC_DEFS_H_ */
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@ -56,6 +56,7 @@ typedef volatile unsigned int * dv_reg_p;
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#define DAVINCI_DMA_3PTC1_BASE (0x01c10400)
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#define DAVINCI_UART0_BASE (0x01c20000)
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#define DAVINCI_UART1_BASE (0x01c20400)
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#define DAVINCI_TIMER3_BASE (0x01c20800)
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#define DAVINCI_I2C_BASE (0x01c21000)
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#define DAVINCI_TIMER0_BASE (0x01c21400)
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#define DAVINCI_TIMER1_BASE (0x01c21800)
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@ -63,6 +64,7 @@ typedef volatile unsigned int * dv_reg_p;
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#define DAVINCI_PWM0_BASE (0x01c22000)
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#define DAVINCI_PWM1_BASE (0x01c22400)
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#define DAVINCI_PWM2_BASE (0x01c22800)
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#define DAVINCI_TIMER4_BASE (0x01c23800)
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#define DAVINCI_SYSTEM_MODULE_BASE (0x01c40000)
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#define DAVINCI_PLL_CNTRL0_BASE (0x01c40800)
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#define DAVINCI_PLL_CNTRL1_BASE (0x01c40c00)
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@ -108,6 +110,7 @@ typedef volatile unsigned int * dv_reg_p;
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#define DAVINCI_MMC_SD1_BASE 0x01d00000
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#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000
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#define DAVINCI_MMC_SD0_BASE 0x01d11000
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#define DAVINCI_DDR_EMIF_CTRL_BASE 0x20000000
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#elif defined(CONFIG_SOC_DM646X)
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#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000
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@ -543,4 +546,14 @@ static inline int get_async3_src(void)
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#endif /* CONFIG_SOC_DA8XX */
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#if defined(CONFIG_SOC_DM365)
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#include <asm/arch/aintc_defs.h>
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#include <asm/arch/ddr2_defs.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pll_defs.h>
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#include <asm/arch/psc_defs.h>
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#include <asm/arch/syscfg_defs.h>
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#include <asm/arch/timer_defs.h>
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#endif
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#endif /* __ASM_ARCH_HARDWARE_H */
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79
arch/arm/include/asm/arch-davinci/pll_defs.h
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79
arch/arm/include/asm/arch-davinci/pll_defs.h
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@ -0,0 +1,79 @@
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/*
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* Copyright (C) 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _DV_PLL_DEFS_H_
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#define _DV_PLL_DEFS_H_
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struct dv_pll_regs {
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unsigned int pid; /* 0x00 */
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unsigned char rsvd0[224]; /* 0x04 */
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unsigned int rstype; /* 0xe4 */
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unsigned char rsvd1[24]; /* 0xe8 */
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unsigned int pllctl; /* 0x100 */
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unsigned char rsvd2[4]; /* 0x104 */
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unsigned int secctl; /* 0x108 */
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unsigned int rv; /* 0x10c */
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unsigned int pllm; /* 0x110 */
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unsigned int prediv; /* 0x114 */
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unsigned int plldiv1; /* 0x118 */
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unsigned int plldiv2; /* 0x11c */
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unsigned int plldiv3; /* 0x120 */
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unsigned int oscdiv1; /* 0x124 */
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unsigned int postdiv; /* 0x128 */
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unsigned int bpdiv; /* 0x12c */
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unsigned char rsvd5[8]; /* 0x130 */
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unsigned int pllcmd; /* 0x138 */
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unsigned int pllstat; /* 0x13c */
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unsigned int alnctl; /* 0x140 */
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unsigned int dchange; /* 0x144 */
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unsigned int cken; /* 0x148 */
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unsigned int ckstat; /* 0x14c */
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unsigned int systat; /* 0x150 */
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unsigned char rsvd6[12]; /* 0x154 */
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unsigned int plldiv4; /* 0x160 */
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unsigned int plldiv5; /* 0x164 */
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unsigned int plldiv6; /* 0x168 */
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unsigned int plldiv7; /* 0x16C */
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unsigned int plldiv8; /* 0x170 */
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unsigned int plldiv9; /* 0x174 */
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};
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#define PLLCTL_PLLEN (1 << 0)
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#define PLLCTL_PLLPWRDN (1 << 1)
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#define PLLCTL_PLLRST (1 << 3)
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#define PLLCTL_PLLENSRC (1 << 5)
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#define PLLCTL_RES_9 (1 << 8)
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#define PLLSECCTL_TINITZ (1 << 16)
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#define PLLSECCTL_TENABLE (1 << 17)
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#define PLLSECCTL_TENABLEDIV (1 << 18)
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#define PLLSECCTL_STOPMODE (1 << 22)
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#define PLLCMD_GOSET (1 << 0)
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#define PLL0_LOCK 0x07000000
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#define PLL1_LOCK 0x07000000
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#define dv_pll0_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL0_BASE)
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#define dv_pll1_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL1_BASE)
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#endif /* _DV_PLL_DEFS_H_ */
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86
arch/arm/include/asm/arch-davinci/psc_defs.h
Normal file
86
arch/arm/include/asm/arch-davinci/psc_defs.h
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@ -0,0 +1,86 @@
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/*
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* Copyright (C) 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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||||
* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _DV_PSC_DEFS_H_
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#define _DV_PSC_DEFS_H_
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/*
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* Power/Sleep Ctrl Register structure
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* See sprufb3.pdf, Chapter 7
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*/
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struct dv_psc_regs {
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unsigned int pid; /* 0x000 */
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unsigned char rsvd0[16]; /* 0x004 */
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unsigned char rsvd1[4]; /* 0x014 */
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unsigned int inteval; /* 0x018 */
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unsigned char rsvd2[36]; /* 0x01C */
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unsigned int merrpr0; /* 0x040 */
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unsigned int merrpr1; /* 0x044 */
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unsigned char rsvd3[8]; /* 0x048 */
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unsigned int merrcr0; /* 0x050 */
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unsigned int merrcr1; /* 0x054 */
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unsigned char rsvd4[8]; /* 0x058 */
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unsigned int perrpr; /* 0x060 */
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unsigned char rsvd5[4]; /* 0x064 */
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unsigned int perrcr; /* 0x068 */
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unsigned char rsvd6[4]; /* 0x06C */
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unsigned int epcpr; /* 0x070 */
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unsigned char rsvd7[4]; /* 0x074 */
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unsigned int epccr; /* 0x078 */
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unsigned char rsvd8[144]; /* 0x07C */
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unsigned char rsvd9[20]; /* 0x10C */
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unsigned int ptcmd; /* 0x120 */
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unsigned char rsvd10[4]; /* 0x124 */
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unsigned int ptstat; /* 0x128 */
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unsigned char rsvd11[212]; /* 0x12C */
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unsigned int pdstat0; /* 0x200 */
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unsigned int pdstat1; /* 0x204 */
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unsigned char rsvd12[248]; /* 0x208 */
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unsigned int pdctl0; /* 0x300 */
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unsigned int pdctl1; /* 0x304 */
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unsigned char rsvd13[536]; /* 0x308 */
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unsigned int mckout0; /* 0x520 */
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unsigned int mckout1; /* 0x524 */
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unsigned char rsvd14[728]; /* 0x528 */
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unsigned int mdstat[52]; /* 0x800 */
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unsigned char rsvd15[304]; /* 0x8D0 */
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unsigned int mdctl[52]; /* 0xA00 */
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};
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/* PSC constants */
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#define EMURSTIE_MASK (0x00000200)
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#define PD0 (0)
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#define PSC_ENABLE (0x3)
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#define PSC_DISABLE (0x2)
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#define PSC_SYNCRESET (0x1)
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#define PSC_SWRSTDISABLE (0x0)
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#define PSC_GOSTAT (1 << 0)
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#define PSC_MD_STATE_MSK (0x1f)
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#define PSC_CMD_GO (1 << 0)
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#define dv_psc_regs ((struct dv_psc_regs *)DAVINCI_PWR_SLEEP_CNTRL_BASE)
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#endif /* _DV_PSC_DEFS_H_ */
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66
arch/arm/include/asm/arch-davinci/syscfg_defs.h
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66
arch/arm/include/asm/arch-davinci/syscfg_defs.h
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@ -0,0 +1,66 @@
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/*
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* Copyright (C) 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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||||
* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
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||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
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||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _DV_SYSCFG_DEFS_H_
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#define _DV_SYSCFG_DEFS_H_
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#ifndef CONFIG_SOC_DA8XX
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/* System Control Module register structure for DM365 */
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struct dv_sys_module_regs {
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unsigned int pinmux[5]; /* 0x00 */
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unsigned int bootcfg; /* 0x14 */
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unsigned int arm_intmux; /* 0x18 */
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unsigned int edma_evtmux; /* 0x1C */
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unsigned int ddr_slew; /* 0x20 */
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unsigned int clkout; /* 0x24 */
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unsigned int device_id; /* 0x28 */
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unsigned int vdac_config; /* 0x2C */
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unsigned int timer64_ctl; /* 0x30 */
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unsigned int usbbphy_ctl; /* 0x34 */
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unsigned int misc; /* 0x38 */
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unsigned int mstpri[2]; /* 0x3C */
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unsigned int vpss_clkctl; /* 0x44 */
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unsigned int peri_clkctl; /* 0x48 */
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unsigned int deepsleep; /* 0x4C */
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unsigned int dft_enable; /* 0x50 */
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unsigned int debounce[8]; /* 0x54 */
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unsigned int vtpiocr; /* 0x74 */
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unsigned int pupdctl0; /* 0x78 */
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unsigned int pupdctl1; /* 0x7C */
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unsigned int hdimcopbt; /* 0x80 */
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unsigned int pll0_config; /* 0x84 */
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unsigned int pll1_config; /* 0x88 */
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};
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#define VPTIO_RDY (1 << 15)
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#define VPTIO_IOPWRDN (1 << 14)
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#define VPTIO_CLRZ (1 << 13)
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#define VPTIO_LOCK (1 << 7)
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#define VPTIO_PWRDN (1 << 6)
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#define VPSS_CLK_CTL_VPSS_CLKMD (1 << 7)
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#define dv_sys_module_regs \
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((struct dv_sys_module_regs *)DAVINCI_SYSTEM_MODULE_BASE)
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#endif /* !CONFIG_SOC_DA8XX */
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#endif /* _DV_SYSCFG_DEFS_H_ */
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