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usb: dwc2-otg: adjust fifo size via platform data

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The total FIFO size of some SoCs may be different from the existen, this
patch supports fifo size setting from platform data.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Xu Ziyuan 2016-07-14 14:52:33 +08:00 committed by Simon Glass
parent fab3357916
commit 4711788267
3 changed files with 22 additions and 9 deletions
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22
drivers/usb/gadget/dwc2_udc_otg.c
View File

@ -403,6 +403,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
int i;
unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
uint32_t dflt_gusbcfg;
uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
debug("Reseting OTG controller\n");
@ -467,18 +468,27 @@ static void reconfig_usbd(struct dwc2_udc *dev)
/* 10. Unmask device IN EP common interrupts*/
writel(DIEPMSK_INIT, &reg->diepmsk);
rx_fifo_sz = RX_FIFO_SIZE;
np_tx_fifo_sz = NPTX_FIFO_SIZE;
tx_fifo_sz = PTX_FIFO_SIZE;
if (dev->pdata->rx_fifo_sz)
rx_fifo_sz = dev->pdata->rx_fifo_sz;
if (dev->pdata->np_tx_fifo_sz)
np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
if (dev->pdata->tx_fifo_sz)
tx_fifo_sz = dev->pdata->tx_fifo_sz;
/* 11. Set Rx FIFO Size (in 32-bit words) */
writel(RX_FIFO_SIZE >> 2, &reg->grxfsiz);
writel(rx_fifo_sz, &reg->grxfsiz);
/* 12. Set Non Periodic Tx FIFO Size */
writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
&reg->gnptxfsiz);
for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
writel((PTX_FIFO_SIZE >> 2) << 16 |
((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
&reg->dieptxf[i-1]);
writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
tx_fifo_sz << 16, &reg->dieptxf[i-1]);
/* Flush the RX FIFO */
writel(RX_FIFO_FLUSH, &reg->grstctl);

6
drivers/usb/gadget/dwc2_udc_otg_regs.h
View File

@ -130,9 +130,9 @@ struct dwc2_usbotg_reg {
#define HIGH_SPEED_CONTROL_PKT_SIZE 64
#define HIGH_SPEED_BULK_PKT_SIZE 512
#define RX_FIFO_SIZE (1024*4)
#define NPTX_FIFO_SIZE (1024*4)
#define PTX_FIFO_SIZE (1536*1)
#define RX_FIFO_SIZE (1024)
#define NPTX_FIFO_SIZE (1024)
#define PTX_FIFO_SIZE (384)
#define DEPCTL_TXFNUM_0 (0x0<<22)
#define DEPCTL_TXFNUM_1 (0x1<<22)

3
include/usb/dwc2_udc.h
View File

@ -20,6 +20,9 @@ struct dwc2_plat_otg_data {
unsigned int usb_phy_ctrl;
unsigned int usb_flags;
unsigned int usb_gusbcfg;
unsigned int rx_fifo_sz;
unsigned int np_tx_fifo_sz;
unsigned int tx_fifo_sz;
};
int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);