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armv8: ls1088ardb: support force SDHC mode by hwconfig
The BRDCFG5[SPISDHC] register field of Qixis device is used to control SPI and SDHC signal routing. 10 = Force SDHC Mode - SPI_CS[0] is routed to CPLD for SDHC_VS use. - SPI_CS[1] is unused. - SPI_CS[2:3] are routed to the TDMRiser slot. 11 = Force eMMC Mode - SPI_CS[0:3] are routed to the eMMC card. 0X = Auto Mode - If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode described above. - Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC mode described above. In default the hardware uses auto mode, but sometimes we need to use force SDHC mode to support SD card hotplug, or SD sleep waking up in kernel. This patch is to support force SDHC mode by hwconfig. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -18,6 +18,7 @@
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#include <environment.h>
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#include <asm/arch-fsl-layerscape/soc.h>
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#include <asm/arch/ppa.h>
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#include <hwconfig.h>
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#include "../common/qixis.h"
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#include "ls1088a_qixis.h"
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@ -296,6 +297,23 @@ void board_retimer_init(void)
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select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
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}
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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#ifdef CONFIG_TARGET_LS1088ARDB
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u8 brdcfg5;
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if (hwconfig("esdhc-force-sd")) {
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brdcfg5 = QIXIS_READ(brdcfg[5]);
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brdcfg5 &= ~BRDCFG5_SPISDHC_MASK;
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brdcfg5 |= BRDCFG5_FORCE_SD;
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QIXIS_WRITE(brdcfg[5], brdcfg5);
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}
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#endif
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return 0;
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}
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#endif
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int board_init(void)
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{
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init_final_memctl_regs();
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@ -36,4 +36,10 @@
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#define BRDCFG9_SFPTX_MASK 0x10
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#define BRDCFG9_SFPTX_SHIFT 4
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/* Definitions of QIXIS Registers for LS1088ARDB */
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/* BRDCFG5 */
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#define BRDCFG5_SPISDHC_MASK 0x0C
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#define BRDCFG5_FORCE_SD 0x08
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#endif
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@ -11,6 +11,8 @@
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_MISC_INIT_R
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#if defined(CONFIG_QSPI_BOOT)
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#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
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#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
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