From 3befd85633d33c4dcca1f359c3f4848c5ab8e4d2 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 25 Oct 2008 06:45:31 +0200 Subject: [PATCH 1/9] ppc4xx: Correctly configure the GPIO pin muxing on Arches Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO pin multiplexing correctly Signed-off-by: Stefan Roese --- include/configs/canyonlands.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index ec08ba7a2cb..f8e880181b7 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -570,6 +570,16 @@ #define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */ +/* + * Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO + * pin multiplexing correctly + */ +#if defined(CONFIG_ARCHES) +#define GPIO43_USE GPIO_SEL /* On Arches this pin is used as GPIO */ +#else +#define GPIO43_USE GPIO_ALT1 /* On Glacier this pin is used as ALT1 -> PerCS3 */ +#endif + /* * PPC4xx GPIO Configuration */ @@ -698,7 +708,7 @@ {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 IRQ(3) */ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 CS(1) */ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 CS(2) */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \ +{GPIO1_BASE, GPIO_OUT, GPIO43_USE, GPIO_OUT_0},/* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO44 CS(4) DMAAck1 IRQ(11)*/ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO45 CS(5) EOT/TC1 IRQ(12)*/ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 PerAddr(5) DMAReq0 IRQ(13)*/ \ From cc2dc9b08cf7c09f9f237f8cb9303f11603d4fb0 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Mon, 27 Oct 2008 12:35:59 +0100 Subject: [PATCH 2/9] ppc4xx: Merge xilinx-ppc440 and xilinx-ppc405 cfg Xilinx ppc440 and ppc405 have many similarities. This patch merge the config files of both infrastuctures Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Stefan Roese --- board/avnet/fx12mm/xparameters.h | 2 +- include/configs/fx12mm.h | 3 - include/configs/ml507.h | 6 +- include/configs/xilinx-ppc.h | 136 +++++++++++++++++++++++++++++++ include/configs/xilinx-ppc405.h | 91 +-------------------- include/configs/xilinx-ppc440.h | 88 ++------------------ 6 files changed, 147 insertions(+), 179 deletions(-) create mode 100644 include/configs/xilinx-ppc.h diff --git a/board/avnet/fx12mm/xparameters.h b/board/avnet/fx12mm/xparameters.h index f7031b347c9..4410f19b76a 100644 --- a/board/avnet/fx12mm/xparameters.h +++ b/board/avnet/fx12mm/xparameters.h @@ -46,6 +46,6 @@ #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 /* FLASH */ -#define XPAR_FLASH_2MX16_MEM0_BASEADDR 0xFFC00000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFFC00000 #endif diff --git a/include/configs/fx12mm.h b/include/configs/fx12mm.h index d45e7a0efd6..8481c33b9f0 100644 --- a/include/configs/fx12mm.h +++ b/include/configs/fx12mm.h @@ -57,11 +57,8 @@ #define CONFIG_PREBOOT "echo U-Boot is up and runnining;" /*Flash*/ -#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_2MX16_MEM0_BASEADDR #define CONFIG_SYS_FLASH_SIZE (4*1024*1024) #define CONFIG_SYS_MAX_FLASH_SECT 71 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 #define MTDIDS_DEFAULT "nor0=fx12mm-flash" #define MTDPARTS_DEFAULT "mtdparts=fx12mm-flash:-(user)" diff --git a/include/configs/ml507.h b/include/configs/ml507.h index c637904fe94..a7319e42739 100644 --- a/include/configs/ml507.h +++ b/include/configs/ml507.h @@ -30,15 +30,15 @@ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x340000 +#define CONFIG_ENV_OFFSET 0x340000 #define CONFIG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CONFIG_ENV_OFFSET) /*Misc*/ -#define CONFIG_SYS_PROMPT "ml507:/# " /* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT "ml507:/# " /* Monitor Command Prompt */ #define CONFIG_PREBOOT "echo U-Boot is up and runnining;" /*Flash*/ -#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) +#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) #define CONFIG_SYS_MAX_FLASH_SECT 259 #define MTDIDS_DEFAULT "nor0=ml507-flash" #define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h new file mode 100644 index 00000000000..e7daa0771ec --- /dev/null +++ b/include/configs/xilinx-ppc.h @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * + * (C) Copyright 2008 + * Georg Schardt + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#ifndef __CONFIG_XLX_H +#define __CONFIG_XLX_H +/* +#define DEBUG +#define ET_DEBUG +*/ + +/*Mem Map*/ +#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (192 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) + +/*Cmd*/ +#include +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_REGINFO +#undef CONFIG_CMD_JFFS2 +#undef CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_DTT +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_IMLS + +/*Misc*/ +#define CONFIG_BOOTDELAY 5/* autoboot after 5 seconds */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 + /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot Argument Buffer Size */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 + /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00C00000 + /* 4 ... 12 MB in DRAM */ +#define CONFIG_SYS_LOAD_ADDR 0x00400000 + /* default load address */ +#define CONFIG_SYS_EXTBDINFO 1 + /* Extended board_into (bd_t) */ +#define CONFIG_SYS_HZ 1000 + /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_LOOPW /* enable loopw command */ +#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_VERSION_VARIABLE /* include version env variable */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + /* Initial Memory map for Linux */ + +/*Stack*/ +#define CONFIG_SYS_INIT_RAM_ADDR 0x800000/* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END \ + - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +/*Speed*/ +#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ + +/*Flash*/ +#ifdef XPAR_FLASH_MEM0_BASEADDR +#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_CMD_JFFS2 +#define CONFIG_JFFS2_CMDLINE +#else +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#endif + +/* serial communication */ +#ifdef XPAR_UARTLITE_0_BASEADDR +#define CONFIG_XILINX_UARTLITE +#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR +#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE +#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } +#else +#ifdef XPAR_UARTNS550_0_BASEADDR +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 4 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 XPAR_UARTNS550_0_BASEADDR +#define CONFIG_SYS_NS16550_CLK XPAR_UARTNS550_0_CLOCK_FREQ_HZ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } +#endif +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc405.h b/include/configs/xilinx-ppc405.h index 74584705ccb..d335f1e29a6 100644 --- a/include/configs/xilinx-ppc405.h +++ b/include/configs/xilinx-ppc405.h @@ -30,97 +30,10 @@ #define __CONFIG_H /* cpu parameter */ -#define CONFIG_4xx 1 #define CONFIG_405 1 +#define CONFIG_4xx 1 #define CONFIG_XILINX_405 1 -/* memory map */ -#define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (192 * 1024) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) - -/* u-boot commands configuration */ -#include - -/*Misc*/ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ - + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ -#define CONFIG_SYS_LOAD_ADDR 0x01000000 /* default load address */ -#define CONFIG_SYS_EXTBDINFO 1 /* Extended board_into (bd_t) */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_LOOPW /* enable loopw command */ -#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_VERSION_VARIABLE /* include version env variable */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ -#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) - /* Initial Memory map for Linux */ -#define CONFIG_SYS_CACHELINE_SIZE 32 -#define CONFIG_SYS_CACHELINE_SHIFT 2 - -/* stack */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */ -#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_FLASH_CF 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_EMPTY_INFO 1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_PROTECTION - -/* serial communication */ -#ifdef XPAR_UARTLITE_0_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR -#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XPAR_UARTNS550_0_BASEADDR -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XPAR_UARTNS550_0_BASEADDR -#define CONFIG_SYS_NS16550_CLK XPAR_UARTNS550_0_CLOCK_FREQ_HZ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif - -/* cmd config */ -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_ELF -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_JFFS2 -#define CONFIG_JFFS2_CMDLINE -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_IMLS +#include #endif diff --git a/include/configs/xilinx-ppc440.h b/include/configs/xilinx-ppc440.h index ac78420bb4d..6e938dcf4b8 100644 --- a/include/configs/xilinx-ppc440.h +++ b/include/configs/xilinx-ppc440.h @@ -17,90 +17,12 @@ #ifndef __CONFIG_GEN_H #define __CONFIG_GEN_H -/* -#define DEBUG -#define ET_DEBUG -*/ - /*CPU*/ -#define CONFIG_XILINX_440 1 -#define CONFIG_440 1 + +/*CPU*/ #define CONFIG_4xx 1 +#define CONFIG_440 1 +#define CONFIG_XILINX_440 1 -/*Mem Map*/ -#define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (192 * 1024) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) - -/*Uart*/ -#define CONFIG_XILINX_UARTLITE -#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } -#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR - -/*Cmd*/ -#include -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_ELF -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_JFFS2 -#define CONFIG_JFFS2_CMDLINE -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_IMLS - -/*Misc*/ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ -#define CONFIG_SYS_LOAD_ADDR 0x00400000 /* default load address */ -#define CONFIG_SYS_EXTBDINFO 1 /* Extended board_into (bd_t) */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_LOOPW /* enable loopw command */ -#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_VERSION_VARIABLE /* include version env variable */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ -#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */ - -/*Stack*/ -#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -/*Speed*/ -#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ - -/*Flash*/ -#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_FLASH_EMPTY_INFO 1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_PROTECTION +#include #endif /* __CONFIG_H */ From 295133258a44f97a57fb2ec339aecfda11f4db95 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 28 Oct 2008 13:36:55 +0100 Subject: [PATCH 3/9] ppc4xx: Handle other board variant in PMC440 FPGA code Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/esd/pmc440/fpga.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c index a35f42bd51d..a2eda32ac89 100644 --- a/board/esd/pmc440/fpga.c +++ b/board/esd/pmc440/fpga.c @@ -220,8 +220,9 @@ int fpga_post_config_fn(int cookie) FPGA_OUT32(&fpga->status, (gd->board_type << STATUS_HWREV_SHIFT) & STATUS_HWREV_MASK); - /* NGCC only: enable ledlink */ - if ((s = getenv("bd_type")) && !strcmp(s, "ngcc")) + /* NGCC/CANDES only: enable ledlink */ + if ((s = getenv("bd_type")) && + ((!strcmp(s, "ngcc")) || (!strcmp(s, "candes")))) FPGA_SETBITS(&fpga->ctrla, 0x29f8c000); return rc; From 492aa9ea13791ca4591b5bde895a425e27ae2d10 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 28 Oct 2008 13:36:56 +0100 Subject: [PATCH 4/9] ppc4xx: Clean up PMC440 header -Codingstyle cleanup -Remove unused GPIO define Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/esd/pmc440/pmc440.h | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/board/esd/pmc440/pmc440.h b/board/esd/pmc440/pmc440.h index d834f258571..295cec1e330 100644 --- a/board/esd/pmc440/pmc440.h +++ b/board/esd/pmc440/pmc440.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 + * (C) Copyright 2007-2008 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com. * * See file CREDITS for list of people who contributed to this @@ -24,8 +24,7 @@ #ifndef __PMC440_H__ #define __PMC440_H__ - -/*----------------------------------------------------------------------- +/* * GPIOs */ #define GPIO1_INTA_FAKE (0x80000000 >> (45-32)) /* GPIO45 OD */ @@ -41,9 +40,10 @@ #define GPIO0_EP_EEP (0x80000000 >> 23) /* GPIO23 O */ #define GPIO0_USB_ID (0x80000000 >> 21) /* GPIO21 I */ #define GPIO0_USB_PRSNT (0x80000000 >> 20) /* GPIO20 I */ -#define GPIO0_SELF_RST (0x80000000 >> 6) /* GPIO6 OD */ -/* FPGA programming pin configuration */ +/* + * FPGA programming pin configuration + */ #define GPIO1_FPGA_PRG (0x80000000 >> (53-32)) /* FPGA program pin (ppc output) */ #define GPIO1_FPGA_CLK (0x80000000 >> (51-32)) /* FPGA clk pin (ppc output) */ #define GPIO1_FPGA_DATA (0x80000000 >> (52-32)) /* FPGA data pin (ppc output) */ @@ -51,7 +51,7 @@ #define GPIO1_FPGA_INIT (0x80000000 >> (54-32)) /* FPGA init pin (ppc input) */ #define GPIO0_FPGA_FORCEINIT (0x80000000 >> 27) /* low: force INIT# low */ -/*----------------------------------------------------------------------- +/* * FPGA interface */ #define FPGA_BA CONFIG_SYS_FPGA_BASE0 @@ -103,7 +103,6 @@ typedef struct pmc440_fpga_s pmc440_fpga_t; #define RESET_OUT (1 << 19) #define IRIGB_R_OUT (1 << 14) - /* status register */ #define STATUS_VERSION_SHIFT 24 #define STATUS_VERSION_MASK 0xff000000 @@ -115,13 +114,11 @@ typedef struct pmc440_fpga_s pmc440_fpga_t; #define STATUS_FIFO_ISF (1 << 9) #define STATUS_HOST_ISF (1 << 8) - /* inputs */ #define RESET_IN (1 << 0) #define CLOCK_IN (1 << 1) #define IRIGB_R_IN (1 << 5) - /* hostctrl register */ #define HOSTCTRL_PMCRSTOUT_GATE (1 << 17) #define HOSTCTRL_PMCRSTOUT_FLAG (1 << 16) @@ -137,7 +134,7 @@ typedef struct pmc440_fpga_s pmc440_fpga_t; #define NGCC_CTRL_BASE (CONFIG_SYS_FPGA_BASE0 + 0x80000) #define NGCC_CTRL_FPGARST_N (1 << 2) -/*----------------------------------------------------------------------- +/* * FPGA to PPC interrupt */ #define IRQ0_FPGA (32+28) /* UIC1 - FPGA internal */ From ca0c2d42b93116a8e1b8ef8ad4493c7dc9b5f2e4 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 28 Oct 2008 13:36:57 +0100 Subject: [PATCH 5/9] ppc4xx: Fix esd loadpci command This patch fixes esd's loadpci command when not all memory on adapter boards is accessable via PCI. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/esd/common/cmd_loadpci.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c index d88b3876dc2..ad490c3494c 100644 --- a/board/esd/common/cmd_loadpci.c +++ b/board/esd/common/cmd_loadpci.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2005 + * (C) Copyright 2005-2008 * Matthias Fuchs, esd GmbH Germany, matthias.fuchs@esd-electronics.com * * See file CREDITS for list of people who contributed to this @@ -23,6 +23,9 @@ #include #include +#if !defined(CONFIG_440) +#include +#endif #if defined(CONFIG_CMD_BSP) @@ -36,18 +39,24 @@ extern int do_autoscript (cmd_tbl_t *, int, int, char *[]); */ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - unsigned int *ptr = 0; + u32 *ptr = 0; int count = 0; int count2 = 0; char addr[16]; char str[] = "\\|/-"; char *local_args[2]; + u32 la, ptm1la; +#if defined(CONFIG_440) + ptm1la = in32r(PCIX0_PTM1LA); +#else + ptm1la = in32r(PTM1LA); +#endif while(1) { /* * Mark sync address */ - ptr = 0; + ptr = (u32 *)ptm1la; memset(ptr, 0, 0x20); *ptr = 0xffffffff; @@ -74,7 +83,8 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } printf("\nGot bootcode %08x: ", *ptr); - sprintf(addr, "%08x", *ptr & ADDRMASK); + la = ptm1la + (*ptr & ADDRMASK); + sprintf(addr, "%08x", la); switch (*ptr & ~ADDRMASK) { case 0: @@ -83,8 +93,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ printf("booting image at addr 0x%s ...\n", addr); setenv("loadaddr", addr); - - do_bootm (cmdtp, 0, 0, NULL); + do_bootm(cmdtp, 0, 0, NULL); break; case 1: @@ -92,7 +101,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * Boot image via autoscr */ printf("executing script at addr 0x%s ...\n", addr); - local_args[0] = addr; local_args[1] = NULL; do_autoscript(cmdtp, 0, 1, local_args); @@ -103,7 +111,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * Call run_cmd */ printf("running command at addr 0x%s ...\n", addr); - run_command ((char*)(*ptr & ADDRMASK), 0); + run_command((char*)la, 0); break; default: From 76b565b69f886d5ae748db65e44f464b0e70d41a Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 28 Oct 2008 13:36:58 +0100 Subject: [PATCH 6/9] ppc4xx: Update PMC440 board configuration Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/PMC440.h | 70 ++++++++++++++++++++++++---------------- 1 file changed, 43 insertions(+), 27 deletions(-) diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 85342a60c31..7071ccbfe70 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 + * (C) Copyright 2007-2008 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com. * Based on the sequoia configuration file. * @@ -46,6 +46,7 @@ #endif #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +#define CONFIG_MISC_INIT_F 1 #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ #define CONFIG_BOARD_TYPES 1 /* support board types */ /*----------------------------------------------------------------------- @@ -79,6 +80,7 @@ #define CONFIG_SYS_USB_HOST 0xe0000400 #define CONFIG_SYS_FPGA_BASE0 0xef000000 /* 32 bit */ #define CONFIG_SYS_FPGA_BASE1 0xef100000 /* 16 bit */ +#define CONFIG_SYS_RESET_BASE 0xef200000 /*----------------------------------------------------------------------- * Initial RAM & stack pointer @@ -139,7 +141,7 @@ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ #define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) @@ -217,13 +219,15 @@ #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ #endif +#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ + /* 440EPx errata CHIP 11 */ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_I2C_CMD_TREE 1 @@ -260,38 +264,50 @@ #define CONFIG_DTT_ADM1021 #define CONFIG_SYS_DTT_ADM1021 { { 0x4c, 0x02, 0, 1, 70, 0, 1, 70, 0} } -#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_PREBOOT "echo Add \\\"run fpga\\\" and " \ + "\\\"painit\\\" to preboot command" #undef CONFIG_BOOTARGS /* Setup some board specific values for the default environment variables */ #define CONFIG_HOSTNAME pmc440 -#define CONFIG_SYS_BOOTFILE "bootfile=/tftpboot/pmc440/uImage\0" -#define CONFIG_SYS_ROOTPATH "rootpath=/opt/eldk_410/ppc_4xx\0" +#define CONFIG_SYS_BOOTFILE "bootfile=/tftpboot/pmc440/uImage\0" +#define CONFIG_SYS_ROOTPATH "rootpath=/opt/eldk/ppc_4xxFP\0" #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_SYS_BOOTFILE \ - CONFIG_SYS_ROOTPATH \ + CONFIG_SYS_BOOTFILE \ + CONFIG_SYS_ROOTPATH \ + "fdt_file=/tftpboot/pmc440/pmc440.dtb\0" \ "netdev=eth0\0" \ "ethrotate=no\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ - "flash_nfs=run nfsargs addip addtty;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ - "kernel_addr=FC000000\0" \ - "ramdisk_addr=FC180000\0" \ + "addmisc=setenv bootargs ${bootargs} mem=${mem}\0" \ + "nandargs=setenv bootargs root=/dev/mtdblock6 rootfstype=jffs2 rw\0" \ + "nand_boot=run nandargs addip addtty addmisc;bootm ${kernel_addr}\0" \ + "nand_boot_fdt=run nandargs addip addtty addmisc;" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ + "run nfsargs addip addtty addmisc;" \ + "bootm\0" \ + "net_nfs_fdt=tftp ${kernel_addr_r} ${bootfile};" \ + "tftp ${fdt_addr_r} ${fdt_file};" \ + "run nfsargs addip addtty addmisc;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "kernel_addr=ffc00000\0" \ + "kernel_addr_r=200000\0" \ + "fpga_addr=fff00000\0" \ + "fdt_addr=fff80000\0" \ + "fdt_addr_r=800000\0" \ + "fpga=fpga loadb 0 ${fpga_addr}\0" \ "load=tftp 200000 /tftpboot/pmc440/u-boot.bin\0" \ - "update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;" \ - "cp.b 200000 FFFA0000 60000\0" \ + "update=protect off fffa0000 ffffffff;era fffa0000 ffffffff;" \ + "cp.b 200000 fffa0000 60000\0" \ "" #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ @@ -366,14 +382,8 @@ CONFIG_SYS_POST_SPR) #define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) - -/* esd expects pram at end of physical memory. - * So no logbuffer at the moment. - */ -#if 0 #define CONFIG_LOGBUFFER -#endif -#define CONFIG_SYS_POST_CACHE_ADDR 0x10000000 /* free virtual address */ +#define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ @@ -478,6 +488,10 @@ #define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_NAND_ADDR | 0x1c000) #endif +/* Memory Bank 1 (RESET) initialization */ +#define CFG_EBC_PB1AP 0x7f817200 //0x03017200 +#define CFG_EBC_PB1CR (CFG_RESET_BASE | 0x1c000) + /* Memory Bank 4 (FPGA / 32Bit) initialization */ #define CONFIG_SYS_EBC_PB4AP 0x03840f40 /* BME=0,TWT=7,CSN=1,TH=7,RE=1,SOR=0,BEM=1 */ #define CONFIG_SYS_EBC_PB4CR (CONFIG_SYS_FPGA_BASE0 | 0x1c000) /* BS=1M,BU=R/W,BW=32bit */ @@ -512,4 +526,6 @@ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_API 1 + #endif /* __CONFIG_H */ From 75183b1a7fc04206d9779d13f16e03853d7e965d Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 28 Oct 2008 13:36:59 +0100 Subject: [PATCH 7/9] ppc4xx: Fix PMC440 BSP commands This patch fixes the PMC440 BSP commands painit and selfreset Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/esd/pmc440/cmd_pmc440.c | 70 ++++++++++++++++++----------------- 1 file changed, 37 insertions(+), 33 deletions(-) diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index 38ee74eb4bc..3f0dca087cb 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -26,6 +26,9 @@ #include #include #include +#if defined(CONFIG_LOGBUFFER) +#include +#endif #include "pmc440.h" @@ -343,14 +346,11 @@ extern env_t *env_ptr; int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - u32 memsize; - u32 pram, env_base; + u32 pram, nextbase, base; char *v; u32 param; ulong *lptr; - memsize = gd->bd->bi_memsize; - v = getenv("pram"); if (v) pram = simple_strtoul(v, NULL, 10); @@ -359,21 +359,42 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 1; } - param = memsize - (pram << 10); + base = gd->bd->bi_memsize; +#if defined(CONFIG_LOGBUFFER) + base -= LOGBUFF_LEN + LOGBUFF_OVERHEAD; +#endif + /* + * gd->bd->bi_memsize == physical ram size - CFG_MEM_TOP_HIDE + */ + param = base - (pram << 10); printf("PARAM: @%08x\n", param); + debug("memsize=0x%08x, base=0x%08x\n", gd->bd->bi_memsize, base); + /* clear entire PA ram */ memset((void*)param, 0, (pram << 10)); - env_base = memsize - 4096 - ((CONFIG_ENV_SIZE + 4096) & ~(4096-1)); - memcpy((void*)env_base, env_ptr, CONFIG_ENV_SIZE); - lptr = (ulong*)memsize; - *(--lptr) = CONFIG_ENV_SIZE; - *(--lptr) = memsize - env_base; - *(--lptr) = crc32(0, (void*)(memsize - 0x08), 0x08); - *(--lptr) = 0; + /* reserve 4k for pointer field */ + nextbase = base - 4096; + lptr = (ulong*)(base); - /* make sure data can be accessed through PCI */ - flush_dcache_range(param, param + (pram << 10) - 1); + /* + * *(--lptr) = item_size; + * *(--lptr) = base - item_base = distance from field top; + */ + + /* env is first (4k aligned) */ + nextbase -= ((CONFIG_ENV_SIZE + 4096 - 1) & ~(4096 - 1)); + memcpy((void*)nextbase, env_ptr, CONFIG_ENV_SIZE); + *(--lptr) = CONFIG_ENV_SIZE; /* size */ + *(--lptr) = base - nextbase; /* offset | type=0 */ + + /* free section */ + *(--lptr) = nextbase - param; /* size */ + *(--lptr) = (base - param) | 126; /* offset | type=126 */ + + /* terminate pointer field */ + *(--lptr) = crc32(0, (void*)(base - 0x10), 0x10); + *(--lptr) = 0; /* offset=0 -> terminator */ return 0; } U_BOOT_CMD( @@ -385,28 +406,11 @@ U_BOOT_CMD( int do_selfreset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - if (argc > 1) { - if (argv[1][0] == '0') { - /* assert */ - printf("self-reset# asserted\n"); - out_be32((void*)GPIO0_TCR, - in_be32((void*)GPIO0_TCR) | GPIO0_SELF_RST); - } else { - /* deassert */ - printf("self-reset# deasserted\n"); - out_be32((void*)GPIO0_TCR, - in_be32((void*)GPIO0_TCR) & ~GPIO0_SELF_RST); - } - } else { - printf("self-reset# is %s\n", - in_be32((void*)GPIO0_TCR) & GPIO0_SELF_RST ? - "active" : "inactive"); - } - + in_be32((void*)CONFIG_SYS_RESET_BASE); return 0; } U_BOOT_CMD( - selfreset, 2, 1, do_selfreset, + selfreset, 1, 1, do_selfreset, "selfreset- assert self-reset# signal\n", NULL ); From be270798900b75ad9c47c7b79c72f70441196c56 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Tue, 28 Oct 2008 13:37:00 +0100 Subject: [PATCH 8/9] ppc4xx: Update PMC440 board support This patch brings PMC440 board support up to date: - fix GPIO configuration - add misc_init_f() - use better values for usbact variable - fix USB 2.0 phy reset sequence - shrink BAR2 to save PCI address space - add FDT support Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/esd/pmc440/pmc440.c | 128 +++++++++++++++++++++++++++++++------- 1 file changed, 106 insertions(+), 22 deletions(-) diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c index 013815e2659..8563d7d5f2c 100644 --- a/board/esd/pmc440/pmc440.c +++ b/board/esd/pmc440/pmc440.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007-2008 + * (Cg) Copyright 2007-2008 * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com. * Based on board/amcc/sequoia/sequoia.c * @@ -45,9 +45,11 @@ DECLARE_GLOBAL_DATA_PTR; extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ +extern void __ft_board_setup(void *blob, bd_t *bd); ulong flash_get_size(ulong base, int banknum); int pci_is_66mhz(void); +int is_monarch(void); int bootstrap_eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt); @@ -107,9 +109,9 @@ int board_early_init_f(void) */ out32(GPIO0_OR, 0x40000002); out32(GPIO0_TCR, 0x4c90011f); - out32(GPIO0_OSRL, 0x28011400); + out32(GPIO0_OSRL, 0x28051400); out32(GPIO0_OSRH, 0x55005000); - out32(GPIO0_TSRL, 0x08011400); + out32(GPIO0_TSRL, 0x08051400); out32(GPIO0_TSRH, 0x55005000); out32(GPIO0_ISR1L, 0x54000000); out32(GPIO0_ISR1H, 0x00000000); @@ -196,6 +198,23 @@ int board_early_init_f(void) return 0; } +#if defined(CONFIG_MISC_INIT_F) +int misc_init_f(void) +{ + struct pci_controller hose; + hose.first_busno = 0; + hose.last_busno = 0; + hose.region_count = 0; + + if (getenv("pciearly") && (!is_monarch())) { + printf("PCI: early target init\n"); + pci_setup_indirect(&hose, PCIX0_CFGADR, PCIX0_CFGDATA); + pci_target_init(&hose); + } + return 0; +} +#endif + /* * misc_init_r. */ @@ -207,6 +226,7 @@ int misc_init_r(void) unsigned long usb2d0cr = 0; unsigned long usb2phy0cr, usb2h0cr = 0; unsigned long sdr0_pfc1; + unsigned long sdr0_srst0, sdr0_srst1; char *act = getenv("usbact"); /* @@ -256,7 +276,7 @@ int misc_init_r(void) /* * USB suff... */ - if ((act == NULL || strcmp(act, "hostdev") == 0) && + if ((act == NULL || strcmp(act, "host") == 0) && !(in_be32((void*)GPIO0_IR) & GPIO0_USB_PRSNT)){ /* SDR Setting */ mfsdr(SDR0_PFC1, sdr0_pfc1); @@ -290,12 +310,46 @@ int misc_init_r(void) mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); mtsdr(SDR0_USB2H0CR, usb2h0cr); - /* clear resets */ + /* + * Take USB out of reset: + * -Initial status = all cores are in reset + * -deassert reset to OPB1, P4OPB0, OPB2, PLB42OPB1 OPB2PLB40 cores + * -wait 1 ms + * -deassert reset to PHY + * -wait 1 ms + * -deassert reset to HOST + * -wait 4 ms + * -deassert all other resets + */ + mfsdr(SDR0_SRST1, sdr0_srst1); + sdr0_srst1 &= ~(SDR0_SRST1_OPBA1 | \ + SDR0_SRST1_P4OPB0 | \ + SDR0_SRST1_OPBA2 | \ + SDR0_SRST1_PLB42OPB1 | \ + SDR0_SRST1_OPB2PLB40); + mtsdr(SDR0_SRST1, sdr0_srst1); udelay(1000); + + mfsdr(SDR0_SRST1, sdr0_srst1); + sdr0_srst1 &= ~SDR0_SRST1_USB20PHY; + mtsdr(SDR0_SRST1, sdr0_srst1); + udelay(1000); + + mfsdr(SDR0_SRST0, sdr0_srst0); + sdr0_srst0 &= ~SDR0_SRST0_USB2H; + mtsdr(SDR0_SRST0, sdr0_srst0); + udelay(4000); + + /* finally all the other resets */ mtsdr(SDR0_SRST1, 0x00000000); - udelay(1000); mtsdr(SDR0_SRST0, 0x00000000); + if (!(in_be32((void*)GPIO0_IR) & GPIO0_USB_PRSNT)) { + /* enable power on USB socket */ + out_be32((void*)GPIO1_OR, + in_be32((void*)GPIO1_OR) & ~GPIO1_USB_PWR_N); + } + printf("USB: Host\n"); } else if ((strcmp(act, "dev") == 0) || @@ -547,14 +601,14 @@ void pci_target_init(struct pci_controller *hose) out32r(PCIX0_PTM2MS, simple_strtoul(ptmms_str, NULL, 16)); out32r(PCIX0_PTM2LA, simple_strtoul(ptmla_str, NULL, 16)); } else { - /* BAR2: default: 16 MB FPGA + registers */ - out32r(PCIX0_PTM2MS, 0xff000001); /* Memory Size/Attribute */ + /* BAR2: default: 4MB FPGA */ + out32r(PCIX0_PTM2MS, 0xffc00001); /* Memory Size/Attribute */ out32r(PCIX0_PTM2LA, 0xef000000); /* Local Addr. Reg */ } if (is_monarch()) { /* BAR2: map FPGA registers behind system memory at 1GB */ - pci_write_config_dword(0, PCI_BASE_ADDRESS_2, 0x40000008); + pci_hose_write_config_dword(hose, 0, PCI_BASE_ADDRESS_2, 0x40000008); } /* @@ -562,8 +616,8 @@ void pci_target_init(struct pci_controller *hose) */ /* Program the board's vendor id */ - pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID, - CONFIG_SYS_PCI_SUBSYS_VENDORID); + pci_hose_write_config_word(hose, 0, PCI_SUBSYSTEM_VENDOR_ID, + CONFIG_SYS_PCI_SUBSYS_VENDORID); /* disabled for PMC405 backward compatibility */ /* Configure command register as bus master */ @@ -571,19 +625,19 @@ void pci_target_init(struct pci_controller *hose) /* 240nS PCI clock */ - pci_write_config_word(0, PCI_LATENCY_TIMER, 1); + pci_hose_write_config_word(hose, 0, PCI_LATENCY_TIMER, 1); /* No error reporting */ - pci_write_config_word(0, PCI_ERREN, 0); + pci_hose_write_config_word(hose, 0, PCI_ERREN, 0); pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101); if (!is_monarch()) { /* Program the board's subsystem id/classcode */ - pci_write_config_word(0, PCI_SUBSYSTEM_ID, - CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH); - pci_write_config_word(0, PCI_CLASS_SUB_CODE, - CONFIG_SYS_PCI_CLASSCODE_NONMONARCH); + pci_hose_write_config_word(hose, 0, PCI_SUBSYSTEM_ID, + CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH); + pci_hose_write_config_word(hose, 0, PCI_CLASS_SUB_CODE, + CONFIG_SYS_PCI_CLASSCODE_NONMONARCH); /* PCI configuration done: release ERREADY */ out_be32((void*)GPIO1_OR, @@ -592,11 +646,14 @@ void pci_target_init(struct pci_controller *hose) in_be32((void*)GPIO1_TCR) | GPIO1_PPC_EREADY); } else { /* Program the board's subsystem id/classcode */ - pci_write_config_word(0, PCI_SUBSYSTEM_ID, - CONFIG_SYS_PCI_SUBSYS_ID_MONARCH); - pci_write_config_word(0, PCI_CLASS_SUB_CODE, - CONFIG_SYS_PCI_CLASSCODE_MONARCH); + pci_hose_write_config_word(hose, 0, PCI_SUBSYSTEM_ID, + CONFIG_SYS_PCI_SUBSYS_ID_MONARCH); + pci_hose_write_config_word(hose, 0, PCI_CLASS_SUB_CODE, + CONFIG_SYS_PCI_CLASSCODE_MONARCH); } + + /* enable host configuration */ + pci_hose_write_config_dword(hose, 0, PCI_BRDGOPT2, 0x00000101); } #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ @@ -626,6 +683,12 @@ static void wait_for_pci_ready(void) { int i; char *s = getenv("pcidelay"); + /* + * We have our own handling of the pcidelay variable. + * Using CONFIG_PCI_BOOTDELAY enables pausing for host + * and adapter devices. For adapter devices we do not + * want this. + */ if (s) { int ms = simple_strtoul(s, NULL, 10); printf("PCI: Waiting for %d ms\n", ms); @@ -851,7 +914,7 @@ int usb_board_init(void) char *act = getenv("usbact"); int i; - if ((act == NULL || strcmp(act, "hostdev") == 0) && + if ((act == NULL || strcmp(act, "host") == 0) && !(in_be32((void*)GPIO0_IR) & GPIO0_USB_PRSNT)) /* enable power on USB socket */ out_be32((void*)GPIO1_OR, @@ -876,3 +939,24 @@ int usb_board_init_fail(void) return 0; } #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT) */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + int rc; + + __ft_board_setup(blob, bd); + + /* + * Disable PCI in non-monarch mode. + */ + if (!is_monarch()) { + rc = fdt_find_and_setprop(blob, "/plb/pci@1ec000000", "status", + "disabled", sizeof("disabled"), 1); + if (rc) { + printf("Unable to update property status in PCI node, err=%s\n", + fdt_strerror(rc)); + } + } +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ From cdd4fe63b094d4b767f12ff241d72566b461ee61 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 31 Oct 2008 10:48:08 +0100 Subject: [PATCH 9/9] ppc4xx: Fix spelling error in MAINTAINERS file Signed-off-by: Stefan Roese --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 260c3e65bb9..a7f9b8737c2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -319,8 +319,8 @@ Ricardo Ribalda ml507 PPC440x5 v5fx30teval PPC440x5 - xilinx-pp440-generic PPC440x5 - xilinx-pp405-generic PPC405 + xilinx-ppc405-generic PPC405 + xilinx-ppc440-generic PPC440x5 Stefan Roese