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mtd: nand: davinci: add header file for driver definitions
The definitions inside emif_defs.h concern davinci nand driver and should be in it's header. So create header file for davinci nand driver and move definitions from emif_defs.h and nand_defs.h to it. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> [trini: Fixup more davinci breakage] Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
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99907176a0
commit
3e01ed00da
@ -14,7 +14,7 @@
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#include <asm/arch/hardware.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/arch/ddr2_defs.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/pll_defs.h>
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void davinci_enable_uart0(void)
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@ -11,6 +11,7 @@
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#include <nand.h>
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#include <ns16550.h>
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#include <post.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/dm365_lowlevel.h>
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#include <asm/arch/hardware.h>
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@ -10,7 +10,7 @@
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
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#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
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@ -1,72 +0,0 @@
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/*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _EMIF_DEFS_H_
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#define _EMIF_DEFS_H_
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#include <asm/arch/hardware.h>
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struct davinci_emif_regs {
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u_int32_t ercsr;
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u_int32_t awccr;
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u_int32_t sdbcr;
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u_int32_t sdrcr;
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u_int32_t ab1cr;
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u_int32_t ab2cr;
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u_int32_t ab3cr;
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u_int32_t ab4cr;
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u_int32_t sdtimr;
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u_int32_t ddrsr;
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u_int32_t ddrphycr;
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u_int32_t ddrphysr;
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u_int32_t totar;
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u_int32_t totactr;
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u_int32_t ddrphyid_rev;
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u_int32_t sdsretr;
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u_int32_t eirr;
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u_int32_t eimr;
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u_int32_t eimsr;
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u_int32_t eimcr;
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u_int32_t ioctrlr;
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u_int32_t iostatr;
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u_int8_t rsvd0[8];
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u_int32_t nandfcr;
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u_int32_t nandfsr;
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u_int8_t rsvd1[8];
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u_int32_t nandfecc[4];
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u_int8_t rsvd2[60];
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u_int32_t nand4biteccload;
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u_int32_t nand4bitecc[4];
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u_int32_t nanderradd1;
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u_int32_t nanderradd2;
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u_int32_t nanderrval1;
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u_int32_t nanderrval2;
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};
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#define davinci_emif_regs \
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((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
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#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << (n-2))
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#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
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#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
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#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
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#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
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#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
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#define DAVINCI_NANDFCR_CS2NAND (1 << 0)
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/* Chip Select setup */
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#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
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#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
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#define DAVINCI_ABCR_WSETUP(n) (n << 26)
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#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
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#define DAVINCI_ABCR_WHOLD(n) (n << 17)
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#define DAVINCI_ABCR_RSETUP(n) (n << 13)
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#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
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#define DAVINCI_ABCR_RHOLD(n) (n << 4)
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#define DAVINCI_ABCR_TA(n) (n << 2)
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#define DAVINCI_ABCR_ASIZE_16BIT 1
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#define DAVINCI_ABCR_ASIZE_8BIT 0
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#endif
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@ -597,7 +597,6 @@ static inline enum davinci_clk_ids get_async3_src(void)
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#if defined(CONFIG_SOC_DM365)
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#include <asm/arch/aintc_defs.h>
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#include <asm/arch/ddr2_defs.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pll_defs.h>
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#include <asm/arch/psc_defs.h>
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@ -1,38 +0,0 @@
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/*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Parts shamelesly stolen from Linux Kernel source tree.
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*
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* ------------------------------------------------------------
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _NAND_DEFS_H_
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#define _NAND_DEFS_H_
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#include <asm/arch/hardware.h>
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#ifdef CONFIG_SOC_DM646X
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#define MASK_CLE 0x80000
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#define MASK_ALE 0x40000
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#else
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#define MASK_CLE 0x10
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#define MASK_ALE 0x08
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#endif
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#ifdef CONFIG_SYS_NAND_MASK_CLE
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#undef MASK_CLE
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#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
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#endif
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#ifdef CONFIG_SYS_NAND_MASK_ALE
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#undef MASK_ALE
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#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
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#endif
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#define NAND_READ_START 0x00
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#define NAND_READ_END 0x30
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#define NAND_STATUS 0x70
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extern void davinci_nand_init(struct nand_chip *nand);
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#endif
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@ -1,23 +0,0 @@
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/*
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* nand driver definitions to re-use davinci nand driver on Keystone2
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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* (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _NAND_DEFS_H_
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#define _NAND_DEFS_H_
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#include <asm/arch/hardware.h>
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#include <linux/mtd/nand.h>
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#define MASK_CLE 0x4000
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#define MASK_ALE 0x2000
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#define NAND_READ_START 0x00
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#define NAND_READ_END 0x30
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#define NAND_STATUS 0x70
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#endif
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@ -1 +0,0 @@
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#include <asm/arch-davinci/emif_defs.h>
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@ -155,4 +155,6 @@ int wdt_kick(void);
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#define INTC_HINT_EN (TNETV107X_INTC_BASE + 0x1500)
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#define INTC_EN_CLR0 (TNETV107X_INTC_BASE + 0x380)
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#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
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#endif /* __ASM_ARCH_HARDWARE_H */
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@ -1,23 +0,0 @@
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/*
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* TNETV107X: NAND definitions
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _NAND_DEFS_H_
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#define _NAND_DEFS_H_
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
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#define MASK_CLE 0x4000
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#define MASK_ALE 0x2000
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#define NAND_READ_START 0x00
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#define NAND_READ_END 0x30
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#define NAND_STATUS 0x70
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extern void davinci_nand_init(struct nand_chip *nand);
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#endif
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@ -1,23 +1,45 @@
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/*
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* emif definitions to re-use davinci emif driver on Keystone2
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* NAND Flash Driver
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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* (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
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* Copyright (C) 2006-2014 Texas Instruments.
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*
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* SPDX-License-Identifier: GPL-2.0+
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* Based on Linux DaVinci NAND driver by TI.
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*/
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#ifndef _EMIF_DEFS_H_
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#define _EMIF_DEFS_H_
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#ifndef _DAVINCI_NAND_H_
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#define _DAVINCI_NAND_H_
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#include <linux/mtd/nand.h>
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#include <asm/arch/hardware.h>
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#define NAND_READ_START 0x00
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#define NAND_READ_END 0x30
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#define NAND_STATUS 0x70
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#define MASK_CLE 0x10
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#define MASK_ALE 0x08
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#ifdef CONFIG_SYS_NAND_MASK_CLE
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#undef MASK_CLE
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#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
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#endif
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#ifdef CONFIG_SYS_NAND_MASK_ALE
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#undef MASK_ALE
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#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
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#endif
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struct davinci_emif_regs {
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uint32_t ercsr;
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uint32_t awccr;
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uint32_t sdbcr;
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uint32_t sdrcr;
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union {
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uint32_t abncr[4];
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uint32_t ab1cr;
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uint32_t ab2cr;
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uint32_t ab3cr;
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uint32_t ab4cr;
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};
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uint32_t sdtimr;
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uint32_t ddrsr;
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uint32_t ddrphycr;
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@ -56,18 +78,21 @@ struct davinci_emif_regs {
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#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
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#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
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#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
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#define DAVINCI_NANDFCR_CS2NAND (1 << 0)
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/* Chip Select setup */
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#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
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#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
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#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
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#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20)
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#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
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#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
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#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7)
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#define DAVINCI_ABCR_RHOLD(n) ((n) << 4)
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#define DAVINCI_ABCR_TA(n) ((n) << 2)
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#define DAVINCI_ABCR_WSETUP(n) (n << 26)
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#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
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#define DAVINCI_ABCR_WHOLD(n) (n << 17)
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#define DAVINCI_ABCR_RSETUP(n) (n << 13)
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#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
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#define DAVINCI_ABCR_RHOLD(n) (n << 4)
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#define DAVINCI_ABCR_TA(n) (n << 2)
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#define DAVINCI_ABCR_ASIZE_16BIT 1
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#define DAVINCI_ABCR_ASIZE_8BIT 0
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void davinci_nand_init(struct nand_chip *nand);
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#endif
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@ -20,7 +20,7 @@
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#include <spi.h>
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#include <spi_flash.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/io.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/davinci_misc.h>
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#ifdef CONFIG_DAVINCI_MMC
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#include <mmc.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/io.h>
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#include <nand.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/davinci_misc.h>
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#ifdef CONFIG_DAVINCI_MMC
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#include <spi.h>
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#include <spi_flash.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/io.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/davinci_misc.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/davinci_misc.h>
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#include <net.h>
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#include <netdev.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/gpio.h>
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#include <netdev.h>
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#include <asm/arch/davinci_misc.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <nand.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/arch/hardware.h>
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#include <asm/ti-common/davinci_nand.h>
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DECLARE_GLOBAL_DATA_PTR;
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#include <net.h>
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#include <netdev.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/io.h>
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#include <asm/arch/davinci_misc.h>
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#include <common.h>
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#include <nand.h>
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#include <asm/arch/nand_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/io.h>
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#include <asm/arch/da850_lowlevel.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/ti-common/davinci_nand.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/arch/davinci_misc.h>
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@ -16,7 +16,6 @@
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/arch/nand_defs.h>
|
||||
#include <asm/arch/emac_defs.h>
|
||||
#include <asm/arch/psc_defs.h>
|
||||
|
||||
|
@ -11,7 +11,7 @@
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/arch/nand_defs.h>
|
||||
#include <asm/ti-common/davinci_nand.h>
|
||||
#include <asm/arch/mux.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
@ -32,8 +32,7 @@
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <nand.h>
|
||||
#include <asm/arch/nand_defs.h>
|
||||
#include <asm/arch/emif_defs.h>
|
||||
#include <asm/ti-common/davinci_nand.h>
|
||||
|
||||
/* Definitions for 4-bit hardware ECC */
|
||||
#define NAND_TIMEOUT 10240
|
||||
|
@ -78,6 +78,8 @@ extern unsigned int davinci_arm_clk_get(void);
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#ifdef CONFIG_SYS_USE_NAND
|
||||
#define CONFIG_NAND_DAVINCI
|
||||
#define CONFIG_SYS_NAND_MASK_CLE 0x80000
|
||||
#define CONFIG_SYS_NAND_MASK_ALE 0x40000
|
||||
#define CONFIG_SYS_NAND_CS 2
|
||||
#undef CONFIG_ENV_IS_IN_FLASH
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
|
@ -136,6 +136,8 @@
|
||||
#define CONFIG_SYS_NAND_USE_FLASH_BBT
|
||||
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
|
||||
#define CONFIG_SYS_NAND_PAGE_2K
|
||||
#define CONFIG_SYS_NAND_MASK_CLE 0x4000
|
||||
#define CONFIG_SYS_NAND_MASK_ALE 0x2000
|
||||
|
||||
#define CONFIG_SYS_NAND_LARGEPAGE
|
||||
#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
|
||||
|
Loading…
Reference in New Issue
Block a user