mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 21:24:21 +08:00
arm: dts: apple: Add preliminary device trees
Add preliminary device trees for the Apple M1 mini (2020) and Apple M1 Macbook Pro 13" (2020). Device tree bindings for the Apple M1 SoC are still being formalized and these device trees will be synchronized with the Linux kernel as needed. The device trees in this commit are based on the initial Apple M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl, pmgr, usb based on bindings on track for inclusion in Linux 5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and watchdog that don't have a proposed binding yet. These device trees are provided as a reference only as U-Boot uses the device tree passed by the m1n1 bootloader. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Mark Kettenis
Tom Rini
parent
785cfde5b3
commit
3dfef53610
@ -29,6 +29,10 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
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exynos5422-odroidxu3.dtb
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dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
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dtb-$(CONFIG_ARCH_APPLE) += \
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t8103-j274.dtb \
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t8103-j293.dtb
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dtb-$(CONFIG_ARCH_DAVINCI) += \
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da850-evm.dtb \
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da850-lcdk.dtb \
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135
arch/arm/dts/t8103-j274.dts
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135
arch/arm/dts/t8103-j274.dts
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@ -0,0 +1,135 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple Mac mini (M1, 2020)
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*
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* target-type: J274
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*
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* Copyright The Asahi Linux Contributors
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*/
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/dts-v1/;
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#include "t8103.dtsi"
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/ {
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compatible = "apple,j274", "apple,t8103", "apple,arm-platform";
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model = "Apple Mac mini (M1, 2020)";
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aliases {
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serial0 = &serial0;
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ethernet0 = ð0;
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wifi0 = &wifi0;
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};
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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stdout-path = "serial0";
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framebuffer0: framebuffer@0 {
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compatible = "apple,simple-framebuffer", "simple-framebuffer";
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reg = <0 0 0 0>; /* To be filled by loader */
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/* Format properties will be added by loader */
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status = "disabled";
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};
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};
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memory@800000000 {
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device_type = "memory";
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reg = <0x8 0 0x2 0>; /* To be filled by loader */
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};
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};
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&serial0 {
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status = "okay";
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};
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&pcie0_dart_0 {
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status = "okay";
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};
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&pcie0_dart_1 {
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status = "okay";
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};
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&pcie0_dart_2 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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pci0: pci@0,0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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pwren-gpios = <&smc 13 0>;
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reset-gpios = <&pinctrl_ap 152 0>;
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max-link-speed = <2>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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pci1: pci@1,0 {
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device_type = "pci";
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reg = <0x800 0x0 0x0 0x0 0x0>;
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reset-gpios = <&pinctrl_ap 153 0>;
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max-link-speed = <2>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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pci2: pci@2,0 {
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device_type = "pci";
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reg = <0x1000 0x0 0x0 0x0 0x0>;
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reset-gpios = <&pinctrl_ap 33 0>;
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max-link-speed = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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&pci0 {
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wifi0: network@0,0 {
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reg = <0x10000 0x0 0x0 0x0 0x0>;
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local-mac-address = [00 00 00 00 00 00];
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};
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};
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&pci2 {
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eth0: ethernet@0,0 {
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reg = <0x30000 0x0 0x0 0x0 0x0>;
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local-mac-address = [00 00 00 00 00 00];
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};
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};
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&dwc3_0_dart_0 {
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status = "okay";
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};
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&dwc3_0_dart_1 {
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status = "okay";
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};
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&dwc3_0 {
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status = "okay";
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};
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&dwc3_1_dart_0 {
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status = "okay";
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};
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&dwc3_1_dart_1 {
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status = "okay";
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};
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&dwc3_1 {
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status = "okay";
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};
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97
arch/arm/dts/t8103-j293.dts
Normal file
97
arch/arm/dts/t8103-j293.dts
Normal file
@ -0,0 +1,97 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple Macbook Pro (M1, 2020)
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*
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* target-type: J293
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*
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* Copyright The Asahi Linux Contributors
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*/
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/dts-v1/;
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#include "t8103.dtsi"
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/ {
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compatible = "apple,j293", "apple,t8103", "apple,arm-platform";
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model = "Apple Macbook Pro (M1, 2020)";
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aliases {
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serial0 = &serial0;
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wifi0 = &wifi0;
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};
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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stdout-path = "serial0";
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framebuffer0: framebuffer@0 {
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compatible = "apple,simple-framebuffer", "simple-framebuffer";
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reg = <0 0 0 0>; /* To be filled by loader */
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/* Format properties will be added by loader */
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status = "disabled";
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};
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};
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memory@800000000 {
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device_type = "memory";
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reg = <0x8 0 0x2 0>; /* To be filled by loader */
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};
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};
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&serial0 {
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status = "okay";
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};
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&pcie0_dart_0 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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pci0: pci@0,0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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pwren-gpios = <&smc 13 0>;
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reset-gpios = <&pinctrl_ap 152 0>;
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max-link-speed = <2>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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&pci0 {
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wifi0: network@0,0 {
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reg = <0x10000 0x0 0x0 0x0 0x0>;
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local-mac-address = [00 00 00 00 00 00];
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};
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};
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&dwc3_0_dart_0 {
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status = "okay";
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};
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&dwc3_0_dart_1 {
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status = "okay";
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};
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&dwc3_0 {
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status = "okay";
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};
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&dwc3_1_dart_0 {
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status = "okay";
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};
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&dwc3_1_dart_1 {
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status = "okay";
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};
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&dwc3_1 {
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status = "okay";
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};
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560
arch/arm/dts/t8103.dtsi
Normal file
560
arch/arm/dts/t8103.dtsi
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@ -0,0 +1,560 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple T8103 "M1" SoC
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*
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* Other names: H13G, "Tonga"
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*
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* Copyright The Asahi Linux Contributors
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/apple.h>
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#include <dt-bindings/spmi/spmi.h>
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/ {
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compatible = "apple,t8103", "apple,arm-platform";
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x0>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu1: cpu@1 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x1>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu2: cpu@2 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x2>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu3: cpu@3 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x3>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu4: cpu@10100 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10100>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu5: cpu@10101 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10101>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu6: cpu@10102 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10102>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu7: cpu@10103 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10103>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&aic>;
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interrupt-names = "hyp-phys", "hyp-virt", "phys", "virt";
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interrupts = <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
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};
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clkref: clock-ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "clkref";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dma-ranges;
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dma-coherent;
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nonposted-mmio;
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serial0: serial@235200000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x35200000 0x0 0x1000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkref>, <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
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power-domains = <&ps_uart0>;
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status = "disabled";
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};
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serial2: serial@235208000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x35208000 0x0 0x1000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkref>, <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
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power-domains = <&ps_uart2>;
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status = "disabled";
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};
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aic: interrupt-controller@23b100000 {
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compatible = "apple,t8103-aic", "apple,aic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x2 0x3b100000 0x0 0x8000>;
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};
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pmgr: power-controller@23b700000 {
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compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2 0x3b700000 0x0 0x14000>;
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ps_pcie_ref: power-controller@1a0 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x1a0>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "pcie_ref";
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};
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ps_imx: power-controller@1b8 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x1b8>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "imx";
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apple,always-on;
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};
|
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|
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ps_sio: power-controller@1c0 {
|
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x1c0>;
|
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "sio";
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};
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ps_uart_p: power-controller@220 {
|
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
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reg = <0x220>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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power-domains = <&ps_sio>;
|
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apple,domain-name = "uart_p";
|
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};
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||||
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ps_uart0: power-controller@270 {
|
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
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reg = <0x270>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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power-domains = <&ps_uart_p>;
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apple,domain-name = "uart0";
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};
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||||
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ps_uart1: power-controller@278 {
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||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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||||
reg = <0x278>;
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||||
#power-domain-cells = <0>;
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#reset-cells = <0>;
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||||
apple,domain-name = "uart1";
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power-domains = <&ps_uart_p>;
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||||
};
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||||
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||||
ps_uart2: power-controller@280 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x280>;
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||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
apple,domain-name = "uart2";
|
||||
power-domains = <&ps_uart_p>;
|
||||
};
|
||||
|
||||
ps_uart3: power-controller@288 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x288>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
apple,domain-name = "uart3";
|
||||
power-domains = <&ps_uart_p>;
|
||||
};
|
||||
|
||||
ps_apcie: power-controller@348 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x348>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
apple,domain-name = "apcie";
|
||||
power-domains = <&ps_imx>;
|
||||
};
|
||||
|
||||
ps_apcie_gp: power-controller@3e8 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x3e8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
apple,domain-name = "apcie_gp";
|
||||
power-domains = <&ps_apcie>;
|
||||
};
|
||||
|
||||
ps_ans2: power-controller@3f0 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x3f0>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
apple,domain-name = "ans2";
|
||||
power-domains = <&ps_apcie_st>;
|
||||
};
|
||||
|
||||
ps_apcie_st: power-controller@418 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x418>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
apple,domain-name = "apcie_st";
|
||||
power-domains = <&ps_apcie>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_ap: pinctrl@23c100000 {
|
||||
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x3c100000 0x0 0x100000>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_ap 0 0 212>;
|
||||
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinmux = <APPLE_PINMUX(188, 1)>,
|
||||
<APPLE_PINMUX(192, 1)>;
|
||||
};
|
||||
|
||||
pcie_pins: pcie-pins {
|
||||
pinmux = <APPLE_PINMUX(150, 1)>,
|
||||
<APPLE_PINMUX(151, 1)>,
|
||||
<APPLE_PINMUX(32, 1)>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_aop: pinctrl@24a820000 {
|
||||
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x4a820000 0x0 0x4000>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_aop 0 0 42>;
|
||||
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pinctrl_nub: pinctrl@23d1f0000 {
|
||||
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x3d1f0000 0x0 0x4000>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_nub 0 0 23>;
|
||||
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pinctrl_smc: pinctrl@23e820000 {
|
||||
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x3e820000 0x0 0x4000>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl_smc 0 0 16>;
|
||||
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
i2c0: i2c@20a110000 {
|
||||
compatible = "apple,i2c-v0";
|
||||
reg = <0x2 0x35010000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clkref>;
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
hpm0: hpm@38 {
|
||||
compatible = "ti,tps6598x";
|
||||
reg = <0x38>;
|
||||
};
|
||||
|
||||
hpm1: hpm@3f {
|
||||
compatible = "ti,tps6598x";
|
||||
reg = <0x3f>;
|
||||
};
|
||||
};
|
||||
|
||||
ans_mbox: mbox@277400000 {
|
||||
compatible = "apple,iop-mailbox-m1";
|
||||
reg = <0x2 0x77400000 0x0 0x20000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&ps_ans2>;
|
||||
#mbox-cells = <1>;
|
||||
endpoints = <32>;
|
||||
};
|
||||
|
||||
ans@27bcc0000 {
|
||||
compatible = "apple,nvme-m1";
|
||||
reg = <0x2 0x7bcc0000 0x0 0x40000>,
|
||||
<0x2 0x7bc50000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&ps_apcie_st>;
|
||||
mboxes = <&ans_mbox 32>;
|
||||
};
|
||||
|
||||
pcie0_dart_0: iommu@681008000 {
|
||||
compatible = "apple,t8103-dart", "apple,dart-m1";
|
||||
reg = <0x6 0x81008000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie0_dart_1: iommu@682008000 {
|
||||
compatible = "apple,t8103-dart", "apple,dart-m1";
|
||||
reg = <0x6 0x82008000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie0_dart_2: iommu@683008000 {
|
||||
compatible = "apple,t8103-dart", "apple,dart-m1";
|
||||
reg = <0x6 0x83008000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
smc_mbox: mbox@23e400000 {
|
||||
compatible = "apple,iop-mailbox-m1";
|
||||
reg = <0x2 0x3e400000 0x0 0x20000>;
|
||||
#mbox-cells = <1>;
|
||||
endpoints = <32>;
|
||||
};
|
||||
|
||||
smc: smc@23e050000 {
|
||||
compatible = "apple,smc-m1";
|
||||
reg = <0x2 0x3e050000 0x0 0x4000>;
|
||||
mboxes = <&smc_mbox 32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-13 = <0x00800000>;
|
||||
};
|
||||
|
||||
pcie0: pcie@690000000 {
|
||||
compatible = "apple,t8103-pcie", "apple,pcie";
|
||||
|
||||
reg = <0x6 0x90000000 0x0 0x1000000>,
|
||||
<0x6 0x80000000 0x0 0x4000>,
|
||||
<0x6 0x81000000 0x0 0x8000>,
|
||||
<0x6 0x82000000 0x0 0x8000>,
|
||||
<0x6 0x83000000 0x0 0x8000>;
|
||||
reg-names = "config", "rc", "port0", "port1", "port2";
|
||||
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
msi-controller;
|
||||
msi-parent = <&pcie0>;
|
||||
msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
|
||||
|
||||
iommu-map = <0x100 &pcie0_dart_0 1 1>,
|
||||
<0x200 &pcie0_dart_1 1 1>,
|
||||
<0x300 &pcie0_dart_2 1 1>;
|
||||
iommu-map-mask = <0xff00>;
|
||||
|
||||
bus-range = <0 3>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000
|
||||
0x0 0x20000000>,
|
||||
<0x02000000 0x0 0xc0000000 0x6 0xc0000000
|
||||
0x0 0x40000000>;
|
||||
|
||||
power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
|
||||
pinctrl-0 = <&pcie_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
device_type = "pci";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dwc3_0_dart_0: iommu@382f00000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x3 0x82f00000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dwc3_0_dart_1: iommu@382f80000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x3 0x82f80000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dwc3_0: usb@382280000{
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x3 0x82280000 0x0 0x100000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dr_mode = "host";
|
||||
iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dwc3_1_dart_0: iommu@502f00000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x5 0x02f00000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dwc3_1_dart_1: iommu@502f80000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x5 0x02f80000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dwc3_1: usb@502280000{
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x5 0x02280000 0x0 0x100000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dr_mode = "host";
|
||||
iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
reboot@23d2b0000 {
|
||||
compatible = "apple,reboot-v0";
|
||||
reg = <0x2 0x3d2b0000 0x0 0x4000>;
|
||||
};
|
||||
|
||||
spi@23510c000 {
|
||||
compatible = "apple,t8103-spi", "apple,spi";
|
||||
reg = <0x2 0x3510c000 0x0 0x4000>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
|
||||
cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
spmi@23d0d8000 {
|
||||
compatible = "apple,t8103-spmi", "apple,spmi";
|
||||
reg = <0x2 0x3d0d9300 0x0 0x100>;
|
||||
interrupt-parent = <&aic>;
|
||||
interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pmu@f {
|
||||
compatible = "apple,sera-pmu";
|
||||
reg = <0xf SPMI_USID>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,5 +1,6 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_APPLE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="t8103-j274"
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_NET is not set
|
||||
|
||||
15
include/dt-bindings/interrupt-controller/apple-aic.h
Normal file
15
include/dt-bindings/interrupt-controller/apple-aic.h
Normal file
@ -0,0 +1,15 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
|
||||
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
|
||||
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
#define AIC_IRQ 0
|
||||
#define AIC_FIQ 1
|
||||
|
||||
#define AIC_TMR_HV_PHYS 0
|
||||
#define AIC_TMR_HV_VIRT 1
|
||||
#define AIC_TMR_GUEST_PHYS 2
|
||||
#define AIC_TMR_GUEST_VIRT 3
|
||||
|
||||
#endif
|
||||
13
include/dt-bindings/pinctrl/apple.h
Normal file
13
include/dt-bindings/pinctrl/apple.h
Normal file
@ -0,0 +1,13 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
|
||||
/*
|
||||
* This header provides constants for Apple pinctrl bindings.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_PINCTRL_APPLE_H
|
||||
#define _DT_BINDINGS_PINCTRL_APPLE_H
|
||||
|
||||
#define APPLE_PINMUX(pin, func) ((pin) | ((func) << 16))
|
||||
#define APPLE_PIN(pinmux) ((pinmux) & 0xffff)
|
||||
#define APPLE_FUNC(pinmux) ((pinmux) >> 16)
|
||||
|
||||
#endif /* _DT_BINDINGS_PINCTRL_APPLE_H */
|
||||
10
include/dt-bindings/spmi/spmi.h
Normal file
10
include/dt-bindings/spmi/spmi.h
Normal file
@ -0,0 +1,10 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
#ifndef __DT_BINDINGS_SPMI_H
|
||||
#define __DT_BINDINGS_SPMI_H
|
||||
|
||||
#define SPMI_USID 0
|
||||
#define SPMI_GSID 1
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user