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https://github.com/u-boot/u-boot.git
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mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Joe Hershberger
Kim Phillips
parent
32795ecad6
commit
396abba261
@ -71,7 +71,7 @@
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#define CONFIG_SYS_TEXT_BASE 0xFEF00000
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#endif
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#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */
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#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */
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#define CONFIG_MISC_INIT_F
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#define CONFIG_MISC_INIT_R
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@ -81,7 +81,8 @@
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*/
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#ifdef CONFIG_MPC8349ITX
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#define CONFIG_COMPACT_FLASH /* The CF card interface on the back of the board */
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/* The CF card interface on the back of the board */
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#define CONFIG_COMPACT_FLASH
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#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
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#define CONFIG_SATA_SIL3114 /* SIL3114 SATA controller */
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#define CONFIG_SYS_USB_HOST /* use the EHCI USB controller */
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@ -111,19 +112,20 @@
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#define CONFIG_SYS_I2C_8574A_ADDR1 0x38 /* I2C1, PCF8574A */
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#define CONFIG_SYS_I2C_8574A_ADDR2 0x39 /* I2C1, PCF8574A */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C0, Board EEPROM */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* I2C1, DS1339 RTC*/
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#define SPD_EEPROM_ADDRESS 0x51 /* I2C1, DDR */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* I2C1, DS1339 RTC*/
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#define SPD_EEPROM_ADDRESS 0x51 /* I2C1, DDR */
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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/* Don't probe these addresses: */
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#define CONFIG_SYS_I2C_NOPROBES {{1, CONFIG_SYS_I2C_8574_ADDR1}, \
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#define CONFIG_SYS_I2C_NOPROBES { {1, CONFIG_SYS_I2C_8574_ADDR1}, \
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{1, CONFIG_SYS_I2C_8574_ADDR2}, \
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{1, CONFIG_SYS_I2C_8574A_ADDR1}, \
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{1, CONFIG_SYS_I2C_8574A_ADDR2}}
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{1, CONFIG_SYS_I2C_8574A_ADDR2} }
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/* Bit definitions for the 8574[A] I2C expander */
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#define I2C_8574_REVISION 0x03 /* Board revision, 00=0.0, 01=0.1, 10=1.0 */
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/* Board revision, 00=0.0, 01=0.1, 10=1.0 */
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#define I2C_8574_REVISION 0x03
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#define I2C_8574_CF 0x08 /* 1=Compact flash absent, 0=present */
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#define I2C_8574_MPCICLKRN 0x10 /* MiniPCI Clk Run */
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#define I2C_8574_PCI66 0x20 /* 0=33MHz PCI, 1=66MHz PCI */
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@ -146,7 +148,8 @@
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#define CONFIG_SYS_ATA_ALT_OFFSET 0x0200
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#define CONFIG_SYS_ATA_STRIDE 2
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#define ATA_RESET_TIME 1 /* If a CF card is not inserted, time out quickly */
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/* If a CF card is not inserted, time out quickly */
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#define ATA_RESET_TIME 1
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#endif
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@ -183,15 +186,15 @@
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/*
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* DDR Setup
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*/
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#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/
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#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
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#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
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#define CONFIG_SYS_83XX_DDR_USES_CS0
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#define CONFIG_SYS_MEMTEST_START 0x1000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_START 0x1000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x2000
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#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
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DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
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#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
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| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)256 << 20)
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@ -200,9 +203,12 @@
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#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
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#endif
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#ifndef CONFIG_SPD_EEPROM /* No SPD? Then manually set up DDR parameters */
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#define CONFIG_SYS_DDR_SIZE 256 /* Mb */
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#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10)
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/* No SPD? Then manually set up DDR parameters */
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#ifndef CONFIG_SPD_EEPROM
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#define CONFIG_SYS_DDR_SIZE 256 /* Mb */
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#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \
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| CSCONFIG_ROW_BIT_13 \
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| CSCONFIG_COL_BIT_10)
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#define CONFIG_SYS_DDR_TIMING_1 0x26242321
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#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45, may need tuning */
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@ -212,11 +218,12 @@
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*Flash on the Local Bus
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*/
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#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
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#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
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#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
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#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
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#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_MAX_FLASH_SECT 135 /* 127 64KB sectors + 8 8KB sectors per device */
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/* 127 64KB sectors + 8 8KB sectors per device */
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#define CONFIG_SYS_MAX_FLASH_SECT 135
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#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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@ -224,11 +231,12 @@
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/* The ITX has two flash chips, but the ITX-GP has only one. To support both
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boards, we say we have two, but don't display a message if we find only one. */
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
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#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + 0x800000}
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#define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size in MB */
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#define CONFIG_SYS_FLASH_SIZE_SHIFT 4 /* log2 of the above value */
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
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#define CONFIG_SYS_FLASH_BANKS_LIST \
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{CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + 0x800000}
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#define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size in MB */
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#define CONFIG_SYS_FLASH_SIZE_SHIFT 4 /* log2 of the above value */
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#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */
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/* Vitesse 7385 */
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@ -248,12 +256,19 @@ boards, we say we have two, but don't display a message if we find only one. */
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/* Flash */
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#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_PS_16 | BR_V)
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#define CONFIG_SYS_OR0_PRELIM ((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) | OR_UPM_XAM | \
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OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_15 | \
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OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD)
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#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_PS_16 | BR_V)
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#define CONFIG_SYS_OR0_PRELIM ((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \
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| OR_UPM_XAM \
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| OR_GPCM_CSNT \
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| OR_GPCM_ACS_DIV2 \
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| OR_GPCM_XACS \
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| OR_GPCM_SCY_15 \
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| OR_GPCM_TRLX \
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| OR_GPCM_EHTR \
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| OR_GPCM_EAD)
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#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | (0x13 + CONFIG_SYS_FLASH_SIZE_SHIFT))
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#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN \
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| (0x13 + CONFIG_SYS_FLASH_SIZE_SHIFT))
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/* Vitesse 7385 */
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@ -261,10 +276,15 @@ boards, we say we have two, but don't display a message if we find only one. */
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#ifdef CONFIG_VSC7385_ENET
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#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_VSC7385_BASE | BR_PS_8 | BR_V)
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#define CONFIG_SYS_OR1_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
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OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX | \
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OR_GPCM_EHTR | OR_GPCM_EAD)
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#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_VSC7385_BASE | BR_PS_8 | BR_V)
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#define CONFIG_SYS_OR1_PRELIM (OR_AM_128KB \
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| OR_GPCM_CSNT \
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| OR_GPCM_XACS \
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| OR_GPCM_SCY_15 \
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| OR_GPCM_SETA \
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| OR_GPCM_TRLX \
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| OR_GPCM_EHTR \
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| OR_GPCM_EAD)
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#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_VSC7385_BASE
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#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128KB)
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@ -273,20 +293,28 @@ boards, we say we have two, but don't display a message if we find only one. */
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/* LED */
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#define CONFIG_SYS_LED_BASE 0xF9000000
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#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LED_BASE | BR_PS_8 | BR_V)
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#define CONFIG_SYS_OR2_PRELIM (OR_AM_2MB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
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OR_GPCM_XACS | OR_GPCM_SCY_9 | OR_GPCM_TRLX | \
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OR_GPCM_EHTR | OR_GPCM_EAD)
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#define CONFIG_SYS_LED_BASE 0xF9000000
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#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LED_BASE | BR_PS_8 | BR_V)
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#define CONFIG_SYS_OR2_PRELIM (OR_AM_2MB \
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| OR_GPCM_CSNT \
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| OR_GPCM_ACS_DIV2 \
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| OR_GPCM_XACS \
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| OR_GPCM_SCY_9 \
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| OR_GPCM_TRLX \
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| OR_GPCM_EHTR \
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| OR_GPCM_EAD)
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/* Compact Flash */
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#ifdef CONFIG_COMPACT_FLASH
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#define CONFIG_SYS_CF_BASE 0xF0000000
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#define CONFIG_SYS_CF_BASE 0xF0000000
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#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_CF_BASE | BR_PS_16 | BR_MS_UPMA | BR_V)
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#define CONFIG_SYS_OR3_PRELIM (OR_UPM_AM | OR_UPM_BI)
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#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_CF_BASE \
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| BR_PS_16 \
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| BR_MS_UPMA \
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| BR_V)
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#define CONFIG_SYS_OR3_PRELIM (OR_UPM_AM | OR_UPM_BI)
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#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_CF_BASE
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#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_64KB)
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@ -305,15 +333,16 @@ boards, we say we have two, but don't display a message if we find only one. */
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#endif
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#define CONFIG_SYS_INIT_RAM_LOCK
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#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/
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#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM addr */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_GBL_DATA_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
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#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
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#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
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/*
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* Local Bus LCRR and LBCR regs
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@ -325,8 +354,10 @@ boards, we say we have two, but don't display a message if we find only one. */
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#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
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#define CONFIG_SYS_LBC_LBCR 0x00000000
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#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
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#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32*/
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/* LB sdram refresh timer, about 6us */
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#define CONFIG_SYS_LBC_LSRT 0x32000000
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/* LB refresh timer prescal, 266MHz/32*/
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#define CONFIG_SYS_LBC_MRTPR 0x20000000
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/*
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* Serial Port
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@ -338,7 +369,7 @@ boards, we say we have two, but don't display a message if we find only one. */
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#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
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#define CONFIG_CONSOLE ttyS0
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#define CONFIG_BAUDRATE 115200
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@ -365,23 +396,27 @@ boards, we say we have two, but don't display a message if we find only one. */
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#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
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#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
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#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI1_MMIO_BASE (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
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#define CONFIG_SYS_PCI1_MMIO_BASE \
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(CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
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#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE
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#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI1_IO_BASE 0x00000000
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#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000
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#define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */
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#define CONFIG_SYS_PCI1_IO_BASE 0x00000000
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#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000
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#define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */
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#ifdef CONFIG_MPC83XX_PCI2
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#define CONFIG_SYS_PCI2_MEM_BASE (CONFIG_SYS_PCI1_MMIO_BASE + CONFIG_SYS_PCI1_MMIO_SIZE)
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#define CONFIG_SYS_PCI2_MEM_BASE \
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(CONFIG_SYS_PCI1_MMIO_BASE + CONFIG_SYS_PCI1_MMIO_SIZE)
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#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE
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#define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI2_MMIO_BASE (CONFIG_SYS_PCI2_MEM_BASE + CONFIG_SYS_PCI2_MEM_SIZE)
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#define CONFIG_SYS_PCI2_MMIO_BASE \
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(CONFIG_SYS_PCI2_MEM_BASE + CONFIG_SYS_PCI2_MEM_SIZE)
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#define CONFIG_SYS_PCI2_MMIO_PHYS CONFIG_SYS_PCI2_MMIO_BASE
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#define CONFIG_SYS_PCI2_MMIO_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI2_IO_BASE 0x00000000
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#define CONFIG_SYS_PCI2_IO_PHYS (CONFIG_SYS_PCI1_IO_PHYS + CONFIG_SYS_PCI1_IO_SIZE)
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#define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */
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#define CONFIG_SYS_PCI2_IO_BASE 0x00000000
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#define CONFIG_SYS_PCI2_IO_PHYS \
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(CONFIG_SYS_PCI1_IO_PHYS + CONFIG_SYS_PCI1_IO_SIZE)
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#define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */
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#endif
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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@ -442,15 +477,16 @@ boards, we say we have two, but don't display a message if we find only one. */
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#ifndef CONFIG_SYS_RAMBOOT
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_ADDR \
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(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) for environment */
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_ENV_SIZE 0x2000
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#else
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#define CONFIG_SYS_NO_FLASH /* Flash is not usable now */
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#define CONFIG_SYS_NO_FLASH /* Flash is not usable now */
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#undef CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
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#define CONFIG_ENV_SIZE 0x2000
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#endif
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#define CONFIG_LOADS_ECHO /* echo on for serial download */
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@ -479,30 +515,30 @@ boards, we say we have two, but don't display a message if we find only one. */
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#define CONFIG_CMD_SDRAM
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#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) \
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|| defined(CONFIG_USB_STORAGE)
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_SUPPORT_VFAT
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|| defined(CONFIG_USB_STORAGE)
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_SUPPORT_VFAT
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#endif
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#ifdef CONFIG_COMPACT_FLASH
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_IDE
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#endif
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#ifdef CONFIG_SATA_SIL3114
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#define CONFIG_CMD_SATA
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#define CONFIG_CMD_SATA
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#endif
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|
||||
#if defined(CONFIG_SATA_SIL3114) || defined(CONFIG_USB_STORAGE)
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_EXT2
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
#define CONFIG_CMD_PCI
|
||||
#define CONFIG_CMD_PCI
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_HARD_I2C
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_CMD_I2C
|
||||
#endif
|
||||
|
||||
/* Watchdog */
|
||||
@ -511,38 +547,41 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
|
||||
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
|
||||
#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
|
||||
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
|
||||
#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
|
||||
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
|
||||
|
||||
#ifdef CONFIG_MPC8349ITX
|
||||
#define CONFIG_SYS_PROMPT "MPC8349E-mITX> " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_PROMPT "MPC8349E-mITX> " /* Monitor Command Prompt */
|
||||
#else
|
||||
#define CONFIG_SYS_PROMPT "MPC8349E-mITX-GP> " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_PROMPT "MPC8349E-mITX-GP> " /* Monitor Command Prompt */
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#else
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
/* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 256 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux*/
|
||||
/* Initial Memory map for Linux*/
|
||||
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
|
||||
|
||||
#define CONFIG_SYS_HRCW_LOW (\
|
||||
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
|
||||
@ -563,7 +602,7 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
HRCWH_SW_WATCHDOG_DISABLE |\
|
||||
HRCWH_ROM_LOC_LOCAL_16BIT |\
|
||||
HRCWH_TSEC1M_IN_GMII |\
|
||||
HRCWH_TSEC2M_IN_GMII )
|
||||
HRCWH_TSEC2M_IN_GMII)
|
||||
#else
|
||||
#define CONFIG_SYS_HRCW_HIGH (\
|
||||
HRCWH_PCI_HOST |\
|
||||
@ -576,14 +615,14 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
HRCWH_SW_WATCHDOG_DISABLE |\
|
||||
HRCWH_ROM_LOC_LOCAL_16BIT |\
|
||||
HRCWH_TSEC1M_IN_GMII |\
|
||||
HRCWH_TSEC2M_IN_GMII )
|
||||
HRCWH_TSEC2M_IN_GMII)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* System performance
|
||||
*/
|
||||
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
|
||||
#define CONFIG_SYS_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
|
||||
#define CONFIG_SYS_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
|
||||
@ -594,8 +633,10 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
/*
|
||||
* System IO Config
|
||||
*/
|
||||
#define CONFIG_SYS_SICRH SICRH_TSOBI1 /* Needed for gigabit to work on TSEC 1 */
|
||||
#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1) /* USB DR as device + USB MPH as host */
|
||||
/* Needed for gigabit to work on TSEC 1 */
|
||||
#define CONFIG_SYS_SICRH SICRH_TSOBI1
|
||||
/* USB DR as device + USB MPH as host */
|
||||
#define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1)
|
||||
|
||||
#define CONFIG_SYS_HID0_INIT 0x00000000
|
||||
#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE
|
||||
@ -604,15 +645,31 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
|
||||
|
||||
/* DDR */
|
||||
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
|
||||
| BATL_PP_10 \
|
||||
| BATL_MEMCOHERENCE)
|
||||
#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
|
||||
/* PCI */
|
||||
#ifdef CONFIG_PCI
|
||||
#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \
|
||||
| BATL_PP_10 \
|
||||
| BATL_MEMCOHERENCE)
|
||||
#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
|
||||
| BATL_PP_10 \
|
||||
| BATL_CACHEINHIBIT \
|
||||
| BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
#else
|
||||
#define CONFIG_SYS_IBAT1L 0
|
||||
#define CONFIG_SYS_IBAT1U 0
|
||||
@ -621,10 +678,21 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MPC83XX_PCI2
|
||||
#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE \
|
||||
| BATL_PP_10 \
|
||||
| BATL_MEMCOHERENCE)
|
||||
#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE \
|
||||
| BATL_PP_10 \
|
||||
| BATL_CACHEINHIBIT \
|
||||
| BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
#else
|
||||
#define CONFIG_SYS_IBAT3L 0
|
||||
#define CONFIG_SYS_IBAT3U 0
|
||||
@ -633,13 +701,24 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
#endif
|
||||
|
||||
/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
|
||||
#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
|
||||
| BATL_PP_10 \
|
||||
| BATL_CACHEINHIBIT \
|
||||
| BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
|
||||
/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
|
||||
#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \
|
||||
BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
#define CONFIG_SYS_IBAT6L (0xF0000000 \
|
||||
| BATL_PP_10 \
|
||||
| BATL_MEMCOHERENCE \
|
||||
| BATL_GUARDEDSTORAGE)
|
||||
#define CONFIG_SYS_IBAT6U (0xF0000000 \
|
||||
| BATU_BL_256M \
|
||||
| BATU_VS \
|
||||
| BATU_VP)
|
||||
|
||||
#define CONFIG_SYS_IBAT7L 0
|
||||
#define CONFIG_SYS_IBAT7U 0
|
||||
@ -672,23 +751,24 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
*/
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
#define CONFIG_NETDEV eth0
|
||||
#define CONFIG_NETDEV "eth0"
|
||||
|
||||
#ifdef CONFIG_MPC8349ITX
|
||||
#define CONFIG_HOSTNAME mpc8349emitx
|
||||
#define CONFIG_HOSTNAME "mpc8349emitx"
|
||||
#else
|
||||
#define CONFIG_HOSTNAME mpc8349emitxgp
|
||||
#define CONFIG_HOSTNAME "mpc8349emitxgp"
|
||||
#endif
|
||||
|
||||
/* Default path and filenames */
|
||||
#define CONFIG_ROOTPATH "/nfsroot/rootfs"
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
|
||||
/* U-Boot image on TFTP server */
|
||||
#define CONFIG_UBOOTPATH "u-boot.bin"
|
||||
|
||||
#ifdef CONFIG_MPC8349ITX
|
||||
#define CONFIG_FDTFILE mpc8349emitx.dtb
|
||||
#define CONFIG_FDTFILE "mpc8349emitx.dtb"
|
||||
#else
|
||||
#define CONFIG_FDTFILE mpc8349emitxgp.dtb
|
||||
#define CONFIG_FDTFILE "mpc8349emitxgp.dtb"
|
||||
#endif
|
||||
|
||||
#define CONFIG_BOOTDELAY 6
|
||||
@ -700,26 +780,26 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
"root=/dev/nfs rw" \
|
||||
" nfsroot=" MK_STR(CONFIG_SERVERIP) ":" CONFIG_ROOTPATH \
|
||||
" ip=" MK_STR(CONFIG_IPADDR) ":" MK_STR(CONFIG_SERVERIP) ":" \
|
||||
MK_STR(CONFIG_GATEWAYIP) ":" MK_STR(CONFIG_NETMASK) ":" \
|
||||
MK_STR(CONFIG_HOSTNAME) ":" MK_STR(CONFIG_NETDEV) ":off" \
|
||||
MK_STR(CONFIG_GATEWAYIP) ":" MK_STR(CONFIG_NETMASK) ":" \
|
||||
CONFIG_HOSTNAME ":" CONFIG_NETDEV ":off" \
|
||||
" console=" MK_STR(CONFIG_CONSOLE) "," MK_STR(CONFIG_BAUDRATE)
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"console=" MK_STR(CONFIG_CONSOLE) "\0" \
|
||||
"netdev=" MK_STR(CONFIG_NETDEV) "\0" \
|
||||
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
|
||||
"netdev=" CONFIG_NETDEV "\0" \
|
||||
"uboot=" CONFIG_UBOOTPATH "\0" \
|
||||
"tftpflash=tftpboot $loadaddr $uboot; " \
|
||||
"protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
|
||||
"erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
|
||||
"cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
|
||||
"protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
|
||||
"cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
|
||||
"protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "\
|
||||
"erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
|
||||
"cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; "\
|
||||
"protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "\
|
||||
"cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0"\
|
||||
"fdtaddr=780000\0" \
|
||||
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0"
|
||||
"fdtfile=" CONFIG_FDTFILE "\0"
|
||||
|
||||
#define CONFIG_NFSBOOTCOMMAND \
|
||||
"setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath" \
|
||||
" ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
|
||||
" ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off "\
|
||||
" console=$console,$baudrate $othbootargs; " \
|
||||
"tftp $loadaddr $bootfile;" \
|
||||
"tftp $fdtaddr $fdtfile;" \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user