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board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board

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Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
David Müller 2011-12-22 13:38:21 +01:00 committed by Stefan Roese
parent 21be309bb7
commit 39441b35c6
3 changed files with 36 additions and 7 deletions
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6
board/mpl/mip405/Makefile
View File

@ -28,8 +28,10 @@ endif
LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \
../common/usb_uhci.o ../common/common_util.o
COBJS = $(BOARD).o cmd_mip405.o \
../common/pci.o \
../common/usb_uhci.o \
../common/common_util.o
SOBJS = init.o

22
board/mpl/mip405/mip405.c
View File

@ -498,6 +498,27 @@ int board_early_init_f (void)
return 0;
}
int board_early_init_r(void)
{
int mode;
/*
* since we are relocated, we can finally enable i-cache
* and set up the flash CS correctly
*/
icache_enable();
setup_cs_reloc();
/* get and display boot mode */
mode = get_boot_mode();
if (mode & BOOT_PCI)
printf("PCI Boot %s Map\n", (mode & BOOT_MPS) ?
"MPS" : "Flash");
else
printf("%s Boot\n", (mode & BOOT_MPS) ?
"MPS" : "Flash");
return 0;
}
/*
* Get some PLD Registers
@ -671,7 +692,6 @@ static int test_dram (unsigned long ramsize)
/* used to check if the time in RTC is valid */
static unsigned long start;
static struct rtc_time tm;
extern flash_info_t flash_info[]; /* info for FLASH chips */
int misc_init_r (void)
{

15
include/configs/MIP405.h
View File

@ -239,11 +239,17 @@
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
#define CONFIG_SYS_UPDATE_FLASH_SIZE
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_FLASH_SHOW_PROGRESS 45
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 256
/*
* JFFS2 partitions
@ -291,6 +297,7 @@
#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_BOARD_EARLY_INIT_R
/* Peripheral Bus Mapping */
#define PER_PLD_ADDR 0xF4000000 /* smallest window is 1MByte 0x10 0000*/