mirror of
https://github.com/u-boot/u-boot.git
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arm: ti: logicpd-som-lv: Migrate to OF_UPSTREAM
The DM37 and OMAP35 SOM-LV share a few files, but both of them can be migrated to OF_UPSTREAM with a small update to their respective u-boot.dtsi files to address changes made the aliases. Both defconfigs need to properly point to the upstream directory structure for the device trees. With those updated, the U-Boot device tree files can be deleted. Signed-off-by: Adam Ford <aford173@gmail.com> V2: Remove DT from Makefile
This commit is contained in:
Adam Ford
Tom Rini
parent
d7e3cc209e
commit
381e73446d
@ -1141,10 +1141,6 @@ dtb-$(CONFIG_TARGET_ETHERNUT5) += ethernut5.dtb
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dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
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dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
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logicpd-som-lv-35xx-devkit.dtb \
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logicpd-som-lv-37xx-devkit.dtb
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dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
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omap3-evm-37xx.dtb \
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omap3-evm.dtb
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@ -14,6 +14,8 @@
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aliases {
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/delete-property/ serial1;
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/delete-property/ serial2;
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/delete-property/ mmc1;
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/delete-property/ mmc2;
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};
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ethernet@08000000 {
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@ -1,27 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/dts-v1/;
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#include "omap34xx.dtsi"
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#include "logicpd-som-lv.dtsi"
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#include "logicpd-som-lv-baseboard.dtsi"
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#include "omap-gpmc-smsc9221.dtsi"
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/ {
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model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
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compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
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};
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&omap3_pmx_core2 {
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hsusb2_2_pins: pinmux_hsusb2_2_pins {
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pinctrl-single,pins = <
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OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
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OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
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OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
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OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
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OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
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OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
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>;
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};
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};
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@ -14,6 +14,8 @@
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aliases {
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/delete-property/ serial1;
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/delete-property/ serial2;
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/delete-property/ mmc1;
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/delete-property/ mmc2;
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};
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ethernet@08000000 {
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@ -1,27 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/dts-v1/;
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#include "omap36xx.dtsi"
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#include "logicpd-som-lv.dtsi"
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#include "logicpd-som-lv-baseboard.dtsi"
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#include "omap-gpmc-smsc9221.dtsi"
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/ {
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model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
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compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
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};
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&omap3_pmx_core2 {
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hsusb2_2_pins: pinmux_hsusb2_2_pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
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OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
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OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
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OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
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OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
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OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
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>;
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};
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};
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@ -1,237 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/ {
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_key_pins>;
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sysboot2 {
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label = "gpio3";
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gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* gpio_111 / uP_GPIO_3 */
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linux,code = <BTN_0>;
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wakeup-source;
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};
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};
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sound {
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compatible = "ti,omap-twl4030";
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ti,model = "omap3logic";
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ti,mcbsp = <&mcbsp2>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins &led_pins_wkup>;
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led1 {
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label = "led1";
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gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* gpio133 */
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linux,default-trigger = "cpu0";
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};
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led2 {
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label = "led2";
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gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* gpio11 */
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linux,default-trigger = "none";
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};
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};
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};
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&vaux1 {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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};
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&vaux4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&mcbsp2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp2_pins>;
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};
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&charger {
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ti,bb-uvolt = <3200000>;
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ti,bb-uamp = <150>;
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
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1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */
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2 0 0x10000000 0x2000000>; /* CS2: 32MB for NOR */
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ethernet@gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&lan9221_pins>;
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interrupt-parent = <&gpio5>;
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interrupts = <24 IRQ_TYPE_LEVEL_LOW>; /* gpio_152 */
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reg = <1 0 0xff>;
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};
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};
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&vpll2 {
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regulator-always-on;
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};
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&dss {
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status = "okay";
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vdds_dsi-supply = <&vpll2>;
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vdda_video-supply = <&video_reg>;
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pinctrl-names = "default";
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pinctrl-0 = <&dss_dpi_pins1>;
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port {
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dpi_out: endpoint {
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remote-endpoint = <&lcd_in>;
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data-lines = <16>;
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};
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};
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};
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/ {
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aliases {
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display0 = &lcd0;
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};
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video_reg: video_reg {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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lcd0: display {
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/* This isn't the exact LCD, but the timings meet spec */
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compatible = "logicpd,type28";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_enable_pin>;
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backlight = <&bl>;
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enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
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port {
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lcd_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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};
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bl: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&backlight_pins>;
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pwms = <&twl_pwm 0 5000000>;
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brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
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default-brightness-level = <7>;
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enable-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* gpio_8 */
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};
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};
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&mmc1 {
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interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
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cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* gpio_110 */
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vmmc-supply = <&vmmc1>;
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bus-width = <4>;
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cap-power-off-card;
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};
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&omap3_pmx_core {
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gpio_key_pins: pinmux_gpio_key_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_xclkb.gpio_111 / uP_GPIO_3*/
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>;
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};
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led_pins: pinmux_led_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x215e, PIN_OUTPUT_PULLUP | MUX_MODE4) /* sdmmc2_dat1.gpio_133 / uP_GPIO_0 */
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>;
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};
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lan9221_pins: pinmux_lan9221_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
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OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
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OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
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OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
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OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_strobe.gpio_126 */
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OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d11.gpio_110 */
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>;
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};
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lcd_enable_pin: pinmux_lcd_enable_pin {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */
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>;
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};
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dss_dpi_pins1: pinmux_dss_dpi_pins1 {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */
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OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */
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OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */
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OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data0.dss_data0 */
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OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data1.dss_data1 */
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OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data2.dss_data2 */
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OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data3.dss_data3 */
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OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data4.dss_data4 */
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OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data5.dss_data5 */
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OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */
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OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */
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OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */
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OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */
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OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */
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OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */
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OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */
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OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */
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OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */
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>;
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};
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};
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&omap3_pmx_wkup {
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led_pins_wkup: pinmux_led_pins_wkup {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 / uP_GPIO_1 */
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>;
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};
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backlight_pins: pinmux_backlight_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* sys_boot6.gpio_8 */
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>;
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};
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};
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&uart1 {
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interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
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};
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/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
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&usb_otg_hs {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb_otg_pins>;
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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phys = <&usb2_phy>;
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phy-names = "usb2-phy";
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mode = <3>;
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power = <50>;
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};
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@ -1,300 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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#include <dt-bindings/input/input.h>
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vcc>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0>;
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};
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wl12xx_vmmc: wl12xx_vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio1 3 0>; /* gpio_3 */
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startup-delay-us = <70000>;
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enable-active-high;
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vin-supply = <&vaux3>;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb2_phy: hsusb2_phy {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb2_reset_pin>;
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
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#phy-cells = <0>;
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};
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/* fixed 26MHz oscillator */
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hfclk_26m: oscillator {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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};
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name = "micron,mt29f4g16abbda3w";
|
||||
nand-bus-width = <16>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
gpmc,device-width = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
clocks = <&hfclk_26m>;
|
||||
clock-names = "fck";
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
touchscreen: tsc2004@48 {
|
||||
compatible = "ti,tsc2004";
|
||||
reg = <0x48>;
|
||||
vio-supply = <&vaux1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tsc2004_pins>;
|
||||
interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
|
||||
|
||||
touchscreen-fuzz-x = <4>;
|
||||
touchscreen-fuzz-y = <7>;
|
||||
touchscreen-fuzz-pressure = <2>;
|
||||
touchscreen-size-x = <4096>;
|
||||
touchscreen-size-y = <4096>;
|
||||
touchscreen-max-pressure = <2048>;
|
||||
|
||||
ti,x-plate-ohms = <280>;
|
||||
ti,esd-recovery-timeout-ms = <8000>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
|
||||
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1273";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
|
||||
ref-clock-frequency = <26000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbhshost {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb2_pins>, <&hsusb2_2_pins>;
|
||||
port2-mode = "ehci-phy";
|
||||
};
|
||||
|
||||
&usbhsehci {
|
||||
phys = <0 &hsusb2_phy>;
|
||||
};
|
||||
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
||||
mmc3_pins: pinmux_mm3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
|
||||
OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
|
||||
OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
|
||||
OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
|
||||
>;
|
||||
};
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi1_pins: pinmux_mcspi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
|
||||
OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
|
||||
OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb2_pins: pinmux_hsusb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb_otg_pins: pinmux_hsusb_otg_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
|
||||
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
|
||||
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
|
||||
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tsc2004_pins: pinmux_tsc2004_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
|
||||
hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
|
||||
>;
|
||||
};
|
||||
|
||||
wl127x_gpio: pinmux_wl127x_gpio_pin {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&mcspi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcspi1_pins>;
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&vaux3 {
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
&twl {
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,use-leds;
|
||||
};
|
||||
@ -9,7 +9,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
|
||||
CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-som-lv-35xx-devkit"
|
||||
CONFIG_SPL_TEXT_BASE=0x40200000
|
||||
CONFIG_TARGET_OMAP3_LOGIC=y
|
||||
# CONFIG_SPL_OMAP3_ID_NAND is not set
|
||||
@ -61,6 +61,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_UPSTREAM=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
# CONFIG_ENV_IS_IN_FAT is not set
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
|
||||
@ -9,7 +9,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
|
||||
CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-som-lv-37xx-devkit"
|
||||
CONFIG_SPL_TEXT_BASE=0x40200000
|
||||
CONFIG_TARGET_OMAP3_LOGIC=y
|
||||
# CONFIG_SPL_OMAP3_ID_NAND is not set
|
||||
@ -61,6 +61,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_UPSTREAM=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
# CONFIG_ENV_IS_IN_FAT is not set
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
|
||||
Loading…
Reference in New Issue
Block a user