mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-27 06:04:40 +08:00
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
cc1e98b559
commit
344a0e4367
@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M5208EVBE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -12,6 +11,7 @@ CONFIG_CMD_IMLS=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M52277EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M52277EVB"
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CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT"
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CONFIG_BOOTDELAY=3
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -16,6 +15,7 @@ CONFIG_CMD_SPI=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_CMD_JFFS2=y
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CONFIG_DEFAULT_DEVICE_TREE="M52277EVB"
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CONFIG_ENV_IS_IN_FLASH=y
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# CONFIG_NET is not set
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CONFIG_MTD_NOR_FLASH=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x43E00000
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CONFIG_TARGET_M52277EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M52277EVB_stmicro"
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CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT"
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CONFIG_BOOTDELAY=3
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -15,6 +14,7 @@ CONFIG_CMD_SPI=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_CMD_JFFS2=y
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CONFIG_DEFAULT_DEVICE_TREE="M52277EVB_stmicro"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=2
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFFC00000
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CONFIG_TARGET_M5235EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
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CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -17,6 +16,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFFE00000
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CONFIG_TARGET_M5235EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -17,6 +16,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFFE00000
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CONFIG_TARGET_M5249EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5249EVB"
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -10,6 +9,7 @@ CONFIG_CMD_IMLS=y
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CONFIG_LOOPW=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5249EVB"
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# CONFIG_NET is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFF800000
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CONFIG_TARGET_M5253DEMO=y
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CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO"
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CONFIG_BOOTDELAY=5
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -14,4 +13,5 @@ CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MAC_PARTITION=y
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CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO"
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CONFIG_MTD_NOR_FLASH=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFFE00000
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CONFIG_TARGET_M5272C3=y
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CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
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CONFIG_BOOTDELAY=5
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -14,6 +13,7 @@ CONFIG_CMD_IMLS=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_PROTECTION=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFFE00000
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CONFIG_TARGET_M5275EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
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CONFIG_BOOTDELAY=5
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -16,6 +15,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_CFI=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0xFFE00000
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CONFIG_TARGET_M5282EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5282EVB"
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CONFIG_BOOTDELAY=5
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# CONFIG_DISPLAY_BOARDINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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@ -14,6 +13,7 @@ CONFIG_CMD_IMLS=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5282EVB"
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_PROTECTION=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M53017EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
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CONFIG_BOOTDELAY=1
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
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@ -15,6 +14,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M5329EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
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CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -16,6 +15,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_PROTECTION=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M5329EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
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CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -16,6 +15,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_PROTECTION=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M5373EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
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CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
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CONFIG_BOOTDELAY=1
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# CONFIG_DISPLAY_BOARDINFO is not set
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@ -16,6 +15,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_PROTECTION=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54418TWR=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR"
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CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
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@ -20,6 +19,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=1
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@ -27,5 +27,5 @@ CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_MII=y
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CONFIG_SPI=y
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CONFIG_CF_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_CF_SPI=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54418TWR=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii"
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CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
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@ -20,6 +19,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii"
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_MII=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54418TWR=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii"
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CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
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@ -20,6 +19,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii"
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_MII=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54418TWR=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq"
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CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
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@ -20,6 +19,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq"
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_MII=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54418TWR=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_mii"
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CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
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@ -20,6 +19,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_mii"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=1
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54418TWR=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_rmii"
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CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
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@ -20,6 +19,7 @@ CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_rmii"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=1
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x0
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CONFIG_TARGET_M54451EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M54451EVB"
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CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000"
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CONFIG_BOOTDELAY=1
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CONFIG_USE_BOOTARGS=y
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@ -21,6 +20,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54451EVB"
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x47E00000
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CONFIG_TARGET_M54451EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M54451EVB_stmicro"
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CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
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CONFIG_BOOTDELAY=1
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CONFIG_USE_BOOTARGS=y
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@ -20,6 +19,7 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_DATE=y
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CONFIG_DEFAULT_DEVICE_TREE="M54451EVB_stmicro"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_USE_ENV_SPI_CS=y
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CONFIG_ENV_SPI_CS=1
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@ -1,7 +1,6 @@
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CONFIG_M68K=y
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CONFIG_SYS_TEXT_BASE=0x4000000
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CONFIG_TARGET_M54455EVB=y
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CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_a66"
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CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666"
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CONFIG_BOOTDELAY=1
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CONFIG_USE_BOOTARGS=y
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@ -25,6 +24,7 @@ CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_JFFS2=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_a66"
|
||||
CONFIG_ENV_IS_IN_FLASH=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
@ -26,6 +25,7 @@ CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_JFFS2=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB"
|
||||
CONFIG_ENV_IS_IN_FLASH=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_i66"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
@ -25,6 +24,7 @@ CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_JFFS2=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_i66"
|
||||
CONFIG_ENV_IS_IN_FLASH=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_intel"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
@ -25,6 +24,7 @@ CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_JFFS2=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_intel"
|
||||
CONFIG_ENV_IS_IN_FLASH=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4FE00000
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_stm33"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
@ -25,6 +24,7 @@ CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_JFFS2=y
|
||||
CONFIG_ISO_PARTITION=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_stm33"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_USE_ENV_SPI_CS=y
|
||||
CONFIG_ENV_SPI_CS=1
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475AFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475AFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475BFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475BFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475CFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475CFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475DFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475DFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475EFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475EFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475FFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475FFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5475EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475GFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5475GFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485AFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485AFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485BFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485BFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485CFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485CFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485DFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485DFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485EFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485EFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485FFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485FFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485GFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485GFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF800000
|
||||
CONFIG_TARGET_M5485EVB=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485HFE"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO"
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="M5485HFE"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
|
@ -1,6 +1,7 @@
|
||||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_MPC8xx=y
|
||||
CONFIG_SYS_IMMR=0xFF000000
|
||||
CONFIG_TARGET_MCR3000=y
|
||||
CONFIG_8xx_GCLK_FREQ=132000000
|
||||
CONFIG_CMD_IMMAP=y
|
||||
@ -36,7 +37,6 @@ CONFIG_SYS_OR6_PRELIM=0xFFFF0908
|
||||
CONFIG_SYS_BR7_PRELIM_BOOL=y
|
||||
CONFIG_SYS_BR7_PRELIM=0x1C000001
|
||||
CONFIG_SYS_OR7_PRELIM=0xFFFF810A
|
||||
CONFIG_SYS_IMMR=0xFF000000
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
|
@ -58,6 +58,39 @@ CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385_BASE"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
@ -103,41 +136,3 @@ CONFIG_MII=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385_BASE"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
|
@ -73,12 +73,56 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE2800000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
|
||||
@ -109,55 +153,3 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE2800000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -72,12 +72,56 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE2800000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
|
||||
@ -108,55 +152,3 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE2800000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -75,12 +75,56 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_0=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="NAND"
|
||||
CONFIG_BR0_OR0_BASE=0xE2800000
|
||||
CONFIG_BR0_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR0_MACHINE_FCM=y
|
||||
CONFIG_OR0_SCY_1=y
|
||||
CONFIG_OR0_CSCT_8_CYCLE=y
|
||||
CONFIG_OR0_CST_ONE_CLOCK=y
|
||||
CONFIG_OR0_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FLASH"
|
||||
CONFIG_BR1_OR1_BASE=0xFE000000
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_8_MBYTES=y
|
||||
CONFIG_OR1_SCY_9=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
|
||||
@ -117,55 +161,3 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_0=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="NAND"
|
||||
CONFIG_BR0_OR0_BASE=0xE2800000
|
||||
CONFIG_BR0_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR0_MACHINE_FCM=y
|
||||
CONFIG_BR0_PORTSIZE_8BIT=y
|
||||
CONFIG_OR0_AM_32_KBYTES=y
|
||||
CONFIG_OR0_SCY_1=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR0_CSCT_8_CYCLE=y
|
||||
CONFIG_OR0_CST_ONE_CLOCK=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FLASH"
|
||||
CONFIG_BR1_OR1_BASE=0xFE000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_8_MBYTES=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_9=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -74,12 +74,56 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xFA000000
|
||||
CONFIG_LBLAW3_NAME="BCSR"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_0=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="NAND"
|
||||
CONFIG_BR0_OR0_BASE=0xE2800000
|
||||
CONFIG_BR0_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR0_MACHINE_FCM=y
|
||||
CONFIG_OR0_SCY_1=y
|
||||
CONFIG_OR0_CSCT_8_CYCLE=y
|
||||
CONFIG_OR0_CST_ONE_CLOCK=y
|
||||
CONFIG_OR0_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FLASH"
|
||||
CONFIG_BR1_OR1_BASE=0xFE000000
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_8_MBYTES=y
|
||||
CONFIG_OR1_SCY_9=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
|
||||
@ -116,55 +160,3 @@ CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR_OR_NAND_PRELIM_0=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="NAND"
|
||||
CONFIG_BR0_OR0_BASE=0xE2800000
|
||||
CONFIG_BR0_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR0_MACHINE_FCM=y
|
||||
CONFIG_BR0_PORTSIZE_8BIT=y
|
||||
CONFIG_OR0_AM_32_KBYTES=y
|
||||
CONFIG_OR0_SCY_1=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR0_CSCT_8_CYCLE=y
|
||||
CONFIG_OR0_CST_ONE_CLOCK=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="FLASH"
|
||||
CONFIG_BR1_OR1_BASE=0xFE000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_16BIT=y
|
||||
CONFIG_OR1_AM_8_MBYTES=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_9=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="BCSR"
|
||||
CONFIG_BR3_OR3_BASE=0xFA000000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_EADC_1=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -76,6 +76,30 @@ CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE0600000
|
||||
CONFIG_LBLAW1_NAME="NAND"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_DPM=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
@ -83,6 +107,7 @@ CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -116,32 +141,3 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -70,12 +70,26 @@ CONFIG_LBLAW0=y
|
||||
CONFIG_LBLAW0_BASE=0xFE000000
|
||||
CONFIG_LBLAW0_NAME="FLASH"
|
||||
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_OPT_SPEC_READ=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -95,19 +109,3 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_QE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -68,9 +68,53 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
|
||||
@ -91,58 +135,3 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_QE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -88,9 +88,53 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1"
|
||||
@ -111,58 +155,3 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_QE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -88,9 +88,53 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1"
|
||||
@ -111,58 +155,3 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_QE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -85,9 +85,53 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
|
||||
@ -108,58 +152,3 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_QE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -68,9 +68,53 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF8008000
|
||||
CONFIG_LBLAW3_NAME="PIB"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -90,58 +134,3 @@ CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_QE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="PIB1"
|
||||
CONFIG_BR2_OR2_BASE=0xF8008000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_32_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_XAM_SET=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="PIB2"
|
||||
CONFIG_BR3_OR3_BASE=0xF8010000
|
||||
CONFIG_BR3_MACHINE_GPCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_CSNT_EARLIER=y
|
||||
CONFIG_OR3_EAD_EXTRA=y
|
||||
CONFIG_OR3_SCY_15=y
|
||||
CONFIG_OR3_XACS_EXTENDED=y
|
||||
CONFIG_OR3_XAM_SET=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_2=y
|
||||
|
@ -53,6 +53,25 @@ CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
@ -60,6 +79,8 @@ CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -72,7 +93,6 @@ CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_DATE=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
@ -80,29 +100,3 @@ CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -57,11 +57,6 @@ CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="SDRAM"
|
||||
CONFIG_LBLAW2_LENGTH_64_MBYTES=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
@ -89,6 +84,13 @@ CONFIG_BR2_MACHINE_SDRAM=y
|
||||
CONFIG_OR2_COLS_9=y
|
||||
CONFIG_OR2_ROWS_13=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_PCI_ONE_PCI1=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
@ -106,12 +108,9 @@ CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MPC8XXX_SPI=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -51,6 +51,25 @@ CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
@ -58,6 +77,8 @@ CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_PCI_ONE_PCI1=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
@ -75,34 +96,7 @@ CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -53,6 +53,25 @@ CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xE2400000
|
||||
CONFIG_LBLAW1_NAME="BCSR"
|
||||
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
@ -60,6 +79,8 @@ CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_PCI_ONE_PCI1=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
@ -83,29 +104,3 @@ CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_MPC8XXX_SPI=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xE2400000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_EHTR_NORMAL=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -97,12 +97,55 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF0000000
|
||||
CONFIG_LBLAW3_NAME="CF"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"
|
||||
@ -131,52 +174,3 @@ CONFIG_MII=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -97,12 +97,55 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF0000000
|
||||
CONFIG_LBLAW3_NAME="CF"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -139,52 +182,3 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -96,12 +96,55 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xF0000000
|
||||
CONFIG_LBLAW3_NAME="CF"
|
||||
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSEC1EP_3=y
|
||||
CONFIG_SPCR_TSEC2EP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -138,52 +181,3 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_16_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="VSC7385"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_128_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="LED"
|
||||
CONFIG_BR2_OR2_BASE=0xF9000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_2_MBYTES=y
|
||||
CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_9=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="CF"
|
||||
CONFIG_BR3_OR3_BASE=0xF0000000
|
||||
CONFIG_BR3_MACHINE_UPMA=y
|
||||
CONFIG_BR3_PORTSIZE_16BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BI_BURSTINHIBIT=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_4=y
|
||||
|
@ -101,12 +101,49 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE0600000
|
||||
CONFIG_LBLAW3_NAME="NAND"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -137,46 +174,3 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
@ -61,12 +61,49 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE0600000
|
||||
CONFIG_LBLAW3_NAME="NAND"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
|
||||
@ -90,46 +127,3 @@ CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
@ -81,12 +81,49 @@ CONFIG_LBLAW3=y
|
||||
CONFIG_LBLAW3_BASE=0xE0600000
|
||||
CONFIG_LBLAW3_NAME="NAND"
|
||||
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -113,46 +150,3 @@ CONFIG_TSEC_ENET=y
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_32_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="BCSR"
|
||||
CONFIG_BR1_OR1_BASE=0xF8000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_CSNT_EARLIER=y
|
||||
CONFIG_OR1_EAD_EXTRA=y
|
||||
CONFIG_OR1_SCY_15=y
|
||||
CONFIG_OR1_XACS_EXTENDED=y
|
||||
CONFIG_OR1_XAM_SET=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR3_OR3=y
|
||||
CONFIG_BR3_OR3_NAME="NAND"
|
||||
CONFIG_BR3_OR3_BASE=0xE0600000
|
||||
CONFIG_BR3_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR3_MACHINE_FCM=y
|
||||
CONFIG_BR3_PORTSIZE_8BIT=y
|
||||
CONFIG_OR3_AM_32_KBYTES=y
|
||||
CONFIG_OR3_BCTLD_NOT_ASSERTED=y
|
||||
CONFIG_OR3_RST_ONE_CLOCK=y
|
||||
CONFIG_OR3_SCY_1=y
|
||||
CONFIG_OR3_TRLX_RELAXED=y
|
||||
CONFIG_OR3_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR3_CST_ONE_CLOCK=y
|
||||
CONFIG_OR3_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
@ -61,12 +61,45 @@ CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"
|
||||
@ -86,7 +119,6 @@ CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_FSL_SATA=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
@ -96,41 +128,3 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
@ -101,12 +101,45 @@ CONFIG_LBLAW2=y
|
||||
CONFIG_LBLAW2_BASE=0xF0000000
|
||||
CONFIG_LBLAW2_NAME="VSC7385"
|
||||
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_ACR_PIPE_DEP_4=y
|
||||
CONFIG_ACR_RPTCNT_4=y
|
||||
CONFIG_SPCR_TSECEP_3=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PCIE"
|
||||
@ -139,41 +172,3 @@ CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFE000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_8_MBYTES=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_9=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_EHTR_1_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="NAND"
|
||||
CONFIG_BR1_OR1_BASE=0xE0600000
|
||||
CONFIG_BR1_ERRORCHECKING_BOTH=y
|
||||
CONFIG_BR1_MACHINE_FCM=y
|
||||
CONFIG_BR1_PORTSIZE_8BIT=y
|
||||
CONFIG_OR1_AM_32_KBYTES=y
|
||||
CONFIG_OR1_SCY_1=y
|
||||
CONFIG_OR1_TRLX_RELAXED=y
|
||||
CONFIG_OR1_CHT_TWO_CLOCK=y
|
||||
CONFIG_OR1_CSCT_8_CYCLE=y
|
||||
CONFIG_OR1_CST_ONE_CLOCK=y
|
||||
CONFIG_OR1_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR2_OR2=y
|
||||
CONFIG_BR2_OR2_NAME="VSC7385"
|
||||
CONFIG_BR2_OR2_BASE=0xF0000000
|
||||
CONFIG_BR2_MACHINE_GPCM=y
|
||||
CONFIG_BR2_PORTSIZE_8BIT=y
|
||||
CONFIG_OR2_AM_128_KBYTES=y
|
||||
CONFIG_OR2_CSNT_EARLIER=y
|
||||
CONFIG_OR2_EAD_EXTRA=y
|
||||
CONFIG_OR2_SCY_15=y
|
||||
CONFIG_OR2_SETA_EXTERNAL=y
|
||||
CONFIG_OR2_XACS_EXTENDED=y
|
||||
CONFIG_OR2_TRLX_RELAXED=y
|
||||
CONFIG_OR2_EHTR_8_CYCLE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
@ -62,9 +62,9 @@ CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_FSL_ESPI=y
|
||||
|
@ -61,9 +61,9 @@ CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_FSL_ESPI=y
|
||||
|
@ -50,9 +50,9 @@ CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_FSL_ESPI=y
|
||||
|
@ -62,9 +62,9 @@ CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_FSL_ESPI=y
|
||||
|
@ -43,9 +43,9 @@ CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_REMOTE=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_FSL_ESPI=y
|
||||
|
@ -50,9 +50,9 @@ CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_FMAN_ENET=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_FSL_ESPI=y
|
||||
|
@ -103,8 +103,19 @@ CONFIG_LBLAW2=y
|
||||
# CONFIG_LBLAW2_ENABLE is not set
|
||||
CONFIG_LBLAW3=y
|
||||
# CONFIG_LBLAW3_ENABLE is not set
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0x80000000
|
||||
CONFIG_BR0_PORTSIZE_32BIT=y
|
||||
CONFIG_OR0_AM_1_GBYTES=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=6
|
||||
@ -137,15 +148,3 @@ CONFIG_MII=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0x80000000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_32BIT=y
|
||||
CONFIG_OR0_AM_1_GBYTES=y
|
||||
CONFIG_OR0_ACS_QUARTER_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_SCY_5=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
||||
CONFIG_LCRR_CLKDIV_8=y
|
||||
|
@ -1,9 +1,9 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SYS_TEXT_BASE=0x80000000
|
||||
CONFIG_XIP=y
|
||||
CONFIG_TARGET_AX25_AE350=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_TARGET_AX25_AE350=y
|
||||
CONFIG_XIP=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
@ -15,7 +15,6 @@ CONFIG_CMD_SF_TEST=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_BOOTP_PREFER_SERVERIP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_OF_SEPARATE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
|
@ -1,10 +1,10 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SYS_TEXT_BASE=0x80000000
|
||||
CONFIG_XIP=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_TARGET_AX25_AE350=y
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_XIP=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_FIT=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
@ -16,7 +16,6 @@ CONFIG_CMD_SF_TEST=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_BOOTP_PREFER_SERVERIP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_OF_SEPARATE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
|
@ -9,9 +9,9 @@ CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
|
||||
CONFIG_CONSOLE_MUX=y
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
|
@ -2,7 +2,6 @@ CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFC00000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x800
|
||||
CONFIG_TARGET_AMCORE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="amcore"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
@ -17,11 +16,10 @@ CONFIG_LOOPW=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_DIAG=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="amcore"
|
||||
CONFIG_ENV_IS_IN_FLASH=y
|
||||
# CONFIG_NET is not set
|
||||
CONFIG_DM=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
|
@ -42,4 +42,3 @@ CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_HOST_ETHER=y
|
||||
CONFIG_USB_ETHER_ASIX=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_TARGET_ASTRO_MCF5373L=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="astro_mcf5373l"
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion"
|
||||
@ -17,6 +16,7 @@ CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_CMD_JFFS2=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="astro_mcf5373l"
|
||||
# CONFIG_NET is not set
|
||||
CONFIG_FPGA_ALTERA=y
|
||||
CONFIG_FPGA_CYCLON2=y
|
||||
|
@ -1,11 +1,11 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SPL=y
|
||||
CONFIG_MACH_SUN50I_H6=y
|
||||
CONFIG_MMC0_CD_PIN="PF6"
|
||||
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
||||
# CONFIG_PSCI_RESET is not set
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_SPL_TEXT_BASE=0x20060
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
|
@ -2,12 +2,13 @@ CONFIG_ARM=y
|
||||
CONFIG_SYS_VENDOR="bitmain"
|
||||
CONFIG_SYS_BOARD="antminer_s9"
|
||||
CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9"
|
||||
CONFIG_ARCH_ZYNQ=y
|
||||
CONFIG_SPL_SYS_DCACHE_OFF=y
|
||||
CONFIG_ARCH_ZYNQ=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_ENV_OFFSET=0x300000
|
||||
CONFIG_SPL_STACK_R_ADDR=0x200000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0
|
||||
CONFIG_DEBUG_UART_BASE=0xe0001000
|
||||
CONFIG_DEBUG_UART_CLOCK=50000000
|
||||
CONFIG_DEBUG_UART=y
|
||||
@ -48,7 +49,6 @@ CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0
|
||||
CONFIG_FPGA_XILINX=y
|
||||
CONFIG_FPGA_ZYNQPL=y
|
||||
CONFIG_DM_GPIO=y
|
||||
|
@ -4,6 +4,8 @@ CONFIG_ARCH_VF610=y
|
||||
CONFIG_SYS_TEXT_BASE=0x3f401000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x800
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c
|
||||
CONFIG_TARGET_BK4R1=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg"
|
||||
@ -34,18 +36,12 @@ CONFIG_NETCONSOLE=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_BOOTCOUNT_BOOTLIMIT=3
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_VYBRID_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
||||
CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2
|
||||
CONFIG_SYS_I2C_MXC=y
|
||||
CONFIG_SYS_I2C_MXC_I2C1=y
|
||||
CONFIG_SYS_I2C_MXC_I2C2=y
|
||||
CONFIG_SYS_I2C_MXC_I2C3=y
|
||||
CONFIG_SYS_I2C_MXC_I2C4=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_GPIO=y
|
||||
CONFIG_MISC=y
|
||||
|
@ -71,6 +71,25 @@ CONFIG_LBLAW1=y
|
||||
CONFIG_LBLAW1_BASE=0xF0000000
|
||||
CONFIG_LBLAW1_NAME="WINDOW1"
|
||||
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFFC00000
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_4_MBYTES=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="WINDOW1"
|
||||
CONFIG_BR1_OR1_BASE=0xF0000000
|
||||
CONFIG_BR1_PORTSIZE_32BIT=y
|
||||
CONFIG_OR1_AM_256_KBYTES=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
CONFIG_HID0_FINAL_EMCP=y
|
||||
CONFIG_HID0_FINAL_ICE=y
|
||||
CONFIG_HID2_HBE=y
|
||||
@ -95,24 +114,3 @@ CONFIG_E1000=y
|
||||
CONFIG_BAUDRATE=9600
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
CONFIG_ELBC_BR0_OR0=y
|
||||
CONFIG_BR0_OR0_NAME="FLASH"
|
||||
CONFIG_BR0_OR0_BASE=0xFFC00000
|
||||
CONFIG_BR0_MACHINE_GPCM=y
|
||||
CONFIG_BR0_PORTSIZE_16BIT=y
|
||||
CONFIG_OR0_AM_4_MBYTES=y
|
||||
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
||||
CONFIG_OR0_CSNT_EARLIER=y
|
||||
CONFIG_OR0_EAD_EXTRA=y
|
||||
CONFIG_OR0_SCY_15=y
|
||||
CONFIG_OR0_XACS_EXTENDED=y
|
||||
CONFIG_OR0_XAM_SET=y
|
||||
CONFIG_OR0_TRLX_RELAXED=y
|
||||
CONFIG_OR0_EHTR_8_CYCLE=y
|
||||
CONFIG_ELBC_BR1_OR1=y
|
||||
CONFIG_BR1_OR1_NAME="WINDOW1"
|
||||
CONFIG_BR1_OR1_BASE=0xF0000000
|
||||
CONFIG_BR1_MACHINE_GPCM=y
|
||||
CONFIG_BR1_PORTSIZE_32BIT=y
|
||||
CONFIG_OR1_AM_256_KBYTES=y
|
||||
CONFIG_OR1_SETA_EXTERNAL=y
|
||||
|
@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x60000000
|
||||
CONFIG_TARGET_CALIMAIN=y
|
||||
CONFIG_DA850_LOWLEVEL=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
@ -24,7 +25,6 @@ CONFIG_CMD_DIAG=y
|
||||
CONFIG_ENV_IS_IN_FLASH=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_BOOTCOUNT_BOOTLIMIT=3
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000
|
||||
CONFIG_DA8XX_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
|
@ -1,16 +1,9 @@
|
||||
CONFIG_X86=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=8
|
||||
CONFIG_DEBUG_UART_BOARD_INIT=y
|
||||
CONFIG_DEBUG_UART_BASE=0x3f8
|
||||
CONFIG_DEBUG_UART_CLOCK=1843200
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_X86_RUN_64BIT=y
|
||||
CONFIG_VENDOR_GOOGLE=y
|
||||
CONFIG_TARGET_CHROMEBOOK_LINK64=y
|
||||
@ -57,13 +50,9 @@ CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_CPU=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_INTEL=y
|
||||
@ -72,7 +61,6 @@ CONFIG_CROS_EC_LPC=y
|
||||
CONFIG_SPL_DM_RTC=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPL_TIMER=y
|
||||
CONFIG_TPM_TIS_LPC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
|
@ -46,8 +46,8 @@ CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MVTWSI=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_MV=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_COBRA5272=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="cobra5272"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMDLINE_EDITING is not set
|
||||
@ -12,6 +11,7 @@ CONFIG_CMD_IMLS=y
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="cobra5272"
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_BAUDRATE=19200
|
||||
|
@ -41,12 +41,12 @@ CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_UUID=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_SDP=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_UUID=y
|
||||
CONFIG_CMD_PMIC=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -5,14 +5,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_TARGET_CRS305_1G_4S=y
|
||||
CONFIG_BUILD_TARGET="u-boot.kwb"
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
CONFIG_DISPLAY_BOARDINFO=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_SYS_ALT_MEMTEST=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
# CONFIG_CMD_USB is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
@ -33,7 +31,6 @@ CONFIG_SYS_I2C_MVTWSI=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
# CONFIG_NAND is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
@ -45,8 +42,3 @@ CONFIG_PCI=y
|
||||
CONFIG_PCI_MVEBU=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_KIRKWOOD_SPI=y
|
||||
# CONFIG_USB is not set
|
||||
# CONFIG_DM_USB is not set
|
||||
# CONFIG_USB_EHCI_HCD is not set
|
||||
# CONFIG_USB_STORAGE is not set
|
||||
# CONFIG_USB_HOST_ETHER is not set
|
||||
|
@ -9,6 +9,7 @@ CONFIG_TARGET_DHCOMIMX6=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
@ -39,7 +40,6 @@ CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_DWC_AHSATA=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
|
||||
CONFIG_FSL_ESDHC=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
|
@ -10,6 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_FIT=y
|
||||
@ -61,8 +63,6 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_BOOTCOUNT_BOOTLIMIT=3
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_FSL_ESDHC=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFF000000
|
||||
CONFIG_TARGET_EB_CPU5282=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_CONSOLE_MUX is not set
|
||||
@ -16,6 +15,7 @@ CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282"
|
||||
CONFIG_LED_STATUS=y
|
||||
CONFIG_LED_STATUS0=y
|
||||
CONFIG_LED_STATUS_BIT=8
|
||||
|
@ -1,7 +1,6 @@
|
||||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xF0000000
|
||||
CONFIG_TARGET_EB_CPU5282=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418"
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_CONSOLE_MUX is not set
|
||||
@ -15,6 +14,7 @@ CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_DATE=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal"
|
||||
CONFIG_LED_STATUS=y
|
||||
CONFIG_LED_STATUS0=y
|
||||
CONFIG_LED_STATUS_BIT=8
|
||||
|
@ -32,7 +32,6 @@ CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
CONFIG_RTC_MC146818=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Intel"
|
||||
|
@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ROCKCHIP_RK3368=y
|
||||
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
|
||||
CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
||||
@ -22,7 +23,6 @@ CONFIG_ANDROID_BOOT_IMAGE=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
|
||||
CONFIG_BOOTSTAGE=y
|
||||
CONFIG_SPL_BOOTSTAGE=y
|
||||
CONFIG_BOOTSTAGE_REPORT=y
|
||||
@ -38,7 +38,6 @@ CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
||||
CONFIG_TPL=y
|
||||
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
|
||||
CONFIG_TPL_BOOTROM_SUPPORT=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
|
@ -5,7 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x800
|
||||
CONFIG_ROCKCHIP_RK322X=y
|
||||
CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
|
||||
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
|
||||
CONFIG_TARGET_EVB_RK3229=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
@ -26,7 +26,6 @@ CONFIG_SPL_TEXT_BASE=0x60000000
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
|
||||
CONFIG_SPL_OPTEE=y
|
||||
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_MMC=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
|
@ -1,11 +1,12 @@
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_SYS_TEXT_BASE=0x80010000
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
|
||||
CONFIG_ARCH_MTMIPS=y
|
||||
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
|
||||
CONFIG_MIPS_BOOT_FDT=y
|
||||
CONFIG_ENV_VARS_UBOOT_CONFIG=y
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_IMAGE_FORMAT_LEGACY=y
|
||||
@ -44,8 +45,6 @@ CONFIG_NET_RANDOM_ETHADDR=y
|
||||
# CONFIG_DM_DEVICE_REMOVE is not set
|
||||
CONFIG_HAVE_BLOCK_DEVICE=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
|
||||
CONFIG_CLK=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_BLINK=y
|
||||
|
@ -1,6 +1,8 @@
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_SYS_TEXT_BASE=0x9c000000
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
|
||||
CONFIG_ARCH_MTMIPS=y
|
||||
CONFIG_BOOT_ROM=y
|
||||
CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
|
||||
@ -8,7 +10,6 @@ CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
|
||||
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
|
||||
CONFIG_MIPS_BOOT_FDT=y
|
||||
CONFIG_ENV_VARS_UBOOT_CONFIG=y
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_IMAGE_FORMAT_LEGACY=y
|
||||
@ -47,8 +48,6 @@ CONFIG_NET_RANDOM_ETHADDR=y
|
||||
# CONFIG_DM_DEVICE_REMOVE is not set
|
||||
CONFIG_HAVE_BLOCK_DEVICE=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
|
||||
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
|
||||
CONFIG_CLK=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_LED_BLINK=y
|
||||
|
@ -131,7 +131,6 @@ CONFIG_CMD_AXI=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_MII_DRIVER=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_HASH=y
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user