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dt-bindings: Resync omap & am33xx pinctrl bindings
These headers are updated to match the versions in Linux 5.13.1. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
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@ -1,3 +1,4 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants specific to AM33XX pinctrl bindings.
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*/
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@ -39,5 +40,133 @@
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#undef PIN_OFF_INPUT_PULLDOWN
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#undef PIN_OFF_WAKEUPENABLE
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#endif
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#define AM335X_PIN_OFFSET_MIN 0x0800U
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#define AM335X_PIN_GPMC_AD0 0x800
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#define AM335X_PIN_GPMC_AD1 0x804
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#define AM335X_PIN_GPMC_AD2 0x808
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#define AM335X_PIN_GPMC_AD3 0x80c
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#define AM335X_PIN_GPMC_AD4 0x810
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#define AM335X_PIN_GPMC_AD5 0x814
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#define AM335X_PIN_GPMC_AD6 0x818
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#define AM335X_PIN_GPMC_AD7 0x81c
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#define AM335X_PIN_GPMC_AD8 0x820
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#define AM335X_PIN_GPMC_AD9 0x824
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#define AM335X_PIN_GPMC_AD10 0x828
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#define AM335X_PIN_GPMC_AD11 0x82c
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#define AM335X_PIN_GPMC_AD12 0x830
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#define AM335X_PIN_GPMC_AD13 0x834
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#define AM335X_PIN_GPMC_AD14 0x838
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#define AM335X_PIN_GPMC_AD15 0x83c
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#define AM335X_PIN_GPMC_A0 0x840
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#define AM335X_PIN_GPMC_A1 0x844
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#define AM335X_PIN_GPMC_A2 0x848
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#define AM335X_PIN_GPMC_A3 0x84c
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#define AM335X_PIN_GPMC_A4 0x850
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#define AM335X_PIN_GPMC_A5 0x854
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#define AM335X_PIN_GPMC_A6 0x858
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#define AM335X_PIN_GPMC_A7 0x85c
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#define AM335X_PIN_GPMC_A8 0x860
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#define AM335X_PIN_GPMC_A9 0x864
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#define AM335X_PIN_GPMC_A10 0x868
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#define AM335X_PIN_GPMC_A11 0x86c
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#define AM335X_PIN_GPMC_WAIT0 0x870
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#define AM335X_PIN_GPMC_WPN 0x874
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#define AM335X_PIN_GPMC_BEN1 0x878
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#define AM335X_PIN_GPMC_CSN0 0x87c
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#define AM335X_PIN_GPMC_CSN1 0x880
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#define AM335X_PIN_GPMC_CSN2 0x884
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#define AM335X_PIN_GPMC_CSN3 0x888
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#define AM335X_PIN_GPMC_CLK 0x88c
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#define AM335X_PIN_GPMC_ADVN_ALE 0x890
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#define AM335X_PIN_GPMC_OEN_REN 0x894
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#define AM335X_PIN_GPMC_WEN 0x898
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#define AM335X_PIN_GPMC_BEN0_CLE 0x89c
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#define AM335X_PIN_LCD_DATA0 0x8a0
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#define AM335X_PIN_LCD_DATA1 0x8a4
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#define AM335X_PIN_LCD_DATA2 0x8a8
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#define AM335X_PIN_LCD_DATA3 0x8ac
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#define AM335X_PIN_LCD_DATA4 0x8b0
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#define AM335X_PIN_LCD_DATA5 0x8b4
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#define AM335X_PIN_LCD_DATA6 0x8b8
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#define AM335X_PIN_LCD_DATA7 0x8bc
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#define AM335X_PIN_LCD_DATA8 0x8c0
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#define AM335X_PIN_LCD_DATA9 0x8c4
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#define AM335X_PIN_LCD_DATA10 0x8c8
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#define AM335X_PIN_LCD_DATA11 0x8cc
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#define AM335X_PIN_LCD_DATA12 0x8d0
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#define AM335X_PIN_LCD_DATA13 0x8d4
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#define AM335X_PIN_LCD_DATA14 0x8d8
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#define AM335X_PIN_LCD_DATA15 0x8dc
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#define AM335X_PIN_LCD_VSYNC 0x8e0
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#define AM335X_PIN_LCD_HSYNC 0x8e4
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#define AM335X_PIN_LCD_PCLK 0x8e8
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#define AM335X_PIN_LCD_AC_BIAS_EN 0x8ec
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#define AM335X_PIN_MMC0_DAT3 0x8f0
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#define AM335X_PIN_MMC0_DAT2 0x8f4
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#define AM335X_PIN_MMC0_DAT1 0x8f8
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#define AM335X_PIN_MMC0_DAT0 0x8fc
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#define AM335X_PIN_MMC0_CLK 0x900
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#define AM335X_PIN_MMC0_CMD 0x904
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#define AM335X_PIN_MII1_COL 0x908
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#define AM335X_PIN_MII1_CRS 0x90c
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#define AM335X_PIN_MII1_RX_ER 0x910
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#define AM335X_PIN_MII1_TX_EN 0x914
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#define AM335X_PIN_MII1_RX_DV 0x918
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#define AM335X_PIN_MII1_TXD3 0x91c
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#define AM335X_PIN_MII1_TXD2 0x920
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#define AM335X_PIN_MII1_TXD1 0x924
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#define AM335X_PIN_MII1_TXD0 0x928
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#define AM335X_PIN_MII1_TX_CLK 0x92c
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#define AM335X_PIN_MII1_RX_CLK 0x930
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#define AM335X_PIN_MII1_RXD3 0x934
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#define AM335X_PIN_MII1_RXD2 0x938
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#define AM335X_PIN_MII1_RXD1 0x93c
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#define AM335X_PIN_MII1_RXD0 0x940
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#define AM335X_PIN_RMII1_REF_CLK 0x944
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#define AM335X_PIN_MDIO 0x948
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#define AM335X_PIN_MDC 0x94c
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#define AM335X_PIN_SPI0_SCLK 0x950
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#define AM335X_PIN_SPI0_D0 0x954
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#define AM335X_PIN_SPI0_D1 0x958
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#define AM335X_PIN_SPI0_CS0 0x95c
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#define AM335X_PIN_SPI0_CS1 0x960
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#define AM335X_PIN_ECAP0_IN_PWM0_OUT 0x964
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#define AM335X_PIN_UART0_CTSN 0x968
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#define AM335X_PIN_UART0_RTSN 0x96c
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#define AM335X_PIN_UART0_RXD 0x970
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#define AM335X_PIN_UART0_TXD 0x974
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#define AM335X_PIN_UART1_CTSN 0x978
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#define AM335X_PIN_UART1_RTSN 0x97c
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#define AM335X_PIN_UART1_RXD 0x980
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#define AM335X_PIN_UART1_TXD 0x984
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#define AM335X_PIN_I2C0_SDA 0x988
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#define AM335X_PIN_I2C0_SCL 0x98c
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#define AM335X_PIN_MCASP0_ACLKX 0x990
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#define AM335X_PIN_MCASP0_FSX 0x994
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#define AM335X_PIN_MCASP0_AXR0 0x998
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#define AM335X_PIN_MCASP0_AHCLKR 0x99c
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#define AM335X_PIN_MCASP0_ACLKR 0x9a0
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#define AM335X_PIN_MCASP0_FSR 0x9a4
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#define AM335X_PIN_MCASP0_AXR1 0x9a8
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#define AM335X_PIN_MCASP0_AHCLKX 0x9ac
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#define AM335X_PIN_XDMA_EVENT_INTR0 0x9b0
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#define AM335X_PIN_XDMA_EVENT_INTR1 0x9b4
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#define AM335X_PIN_WARMRSTN 0x9b8
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#define AM335X_PIN_NNMI 0x9c0
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#define AM335X_PIN_TMS 0x9d0
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#define AM335X_PIN_TDI 0x9d4
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#define AM335X_PIN_TDO 0x9d8
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#define AM335X_PIN_TCK 0x9dc
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#define AM335X_PIN_TRSTN 0x9e0
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#define AM335X_PIN_EMU0 0x9e4
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#define AM335X_PIN_EMU1 0x9e8
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#define AM335X_PIN_RTC_PWRONRSTN 0x9f8
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#define AM335X_PIN_PMIC_POWER_EN 0x9fc
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#define AM335X_PIN_EXT_WAKEUP 0xa00
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#define AM335X_PIN_USB0_DRVVBUS 0xa1c
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#define AM335X_PIN_USB1_DRVVBUS 0xa34
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#define AM335X_PIN_OFFSET_MAX 0x0a34U
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#endif
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#define PULL_UP (1 << 4)
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#define ALTELECTRICALSEL (1 << 5)
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/* 34xx specific mux bit defines */
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/* omap3/4/5 specific mux bit defines */
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#define INPUT_EN (1 << 8)
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#define OFF_EN (1 << 9)
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#define OFFOUT_EN (1 << 10)
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@ -32,8 +32,6 @@
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#define OFF_PULL_EN (1 << 12)
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#define OFF_PULL_UP (1 << 13)
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#define WAKEUP_EN (1 << 14)
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/* 44xx specific mux bit defines */
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#define WAKEUP_EVENT (1 << 15)
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/* Active pin states */
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@ -48,8 +46,8 @@
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#define PIN_OFF_NONE 0
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#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
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#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
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#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
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#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
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#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP)
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#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN)
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#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
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/*
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#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
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#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
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#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0)
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#define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux)
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/*
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* Macros to allow using the offset from the padconf physical address
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