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mips: octeon: Add cvmx-helper-loop.c
Import cvmx-helper-loop.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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arch/mips/mach-octeon/cvmx-helper-loop.c
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178
arch/mips/mach-octeon/cvmx-helper-loop.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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* Functions for LOOP initialization, configuration,
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* and monitoring.
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*/
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#include <log.h>
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#include <malloc.h>
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#include <net.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/octeon_fdt.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-fdt.h>
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#include <mach/cvmx-helper-gpio.h>
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#include <mach/cvmx-agl-defs.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include <mach/cvmx-ciu-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-gserx-defs.h>
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#include <mach/cvmx-ilk-defs.h>
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#include <mach/cvmx-ipd-defs.h>
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#include <mach/cvmx-lbk-defs.h>
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#include <mach/cvmx-pcsx-defs.h>
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#include <mach/cvmx-pcsxx-defs.h>
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#include <mach/cvmx-pki-defs.h>
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#include <mach/cvmx-pko-defs.h>
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#include <mach/cvmx-xcv-defs.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-ilk.h>
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#include <mach/cvmx-pki.h>
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int __cvmx_helper_loop_enumerate(int xiface)
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{
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return OCTEON_IS_MODEL(OCTEON_CN68XX) ?
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8 : (OCTEON_IS_MODEL(OCTEON_CNF71XX) ? 2 : 4);
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}
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/**
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* @INTERNAL
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* Probe a LOOP interface and determine the number of ports
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* connected to it. The LOOP interface should still be down
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* after this call.
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*
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* @param xiface Interface to probe
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*
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* @return Number of ports on the interface. Zero to disable.
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*/
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int __cvmx_helper_loop_probe(int xiface)
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{
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return __cvmx_helper_loop_enumerate(xiface);
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}
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/**
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* @INTERNAL
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* Bringup and enable a LOOP interface. After this call packet
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* I/O should be fully functional. This is called with IPD
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* enabled but PKO disabled.
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*
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* @param interface to bring up
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*
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* @return Zero on success, negative on failure
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*/
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int __cvmx_helper_loop_enable(int xiface)
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{
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cvmx_pip_prt_cfgx_t port_cfg;
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int num_ports, index;
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unsigned long offset;
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struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
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num_ports = __cvmx_helper_get_num_ipd_ports(xiface);
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/*
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* We need to disable length checking so packet < 64 bytes and jumbo
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* frames don't get errors
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*/
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for (index = 0; index < num_ports; index++) {
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offset = ((octeon_has_feature(OCTEON_FEATURE_PKND)) ?
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cvmx_helper_get_pknd(xiface, index) :
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cvmx_helper_get_ipd_port(xiface, index));
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if (octeon_has_feature(OCTEON_FEATURE_PKI)) {
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cvmx_pki_endis_l2_errs(xi.node, offset, 1, 0, 0);
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cvmx_pki_endis_fcs_check(xi.node, offset, 0, 0);
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} else {
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port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(offset));
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port_cfg.s.maxerr_en = 0;
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port_cfg.s.minerr_en = 0;
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csr_wr(CVMX_PIP_PRT_CFGX(offset), port_cfg.u64);
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}
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}
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/*
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* Disable FCS stripping for loopback ports
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*/
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if (!octeon_has_feature(OCTEON_FEATURE_PKND)) {
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cvmx_ipd_sub_port_fcs_t ipd_sub_port_fcs;
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ipd_sub_port_fcs.u64 = csr_rd(CVMX_IPD_SUB_PORT_FCS);
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ipd_sub_port_fcs.s.port_bit2 = 0;
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csr_wr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64);
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}
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/*
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* Set PKND and BPID for loopback ports.
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*/
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if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
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cvmx_pko_reg_loopback_pkind_t lp_pknd;
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cvmx_pko_reg_loopback_bpid_t lp_bpid;
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for (index = 0; index < num_ports; index++) {
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int pknd = cvmx_helper_get_pknd(xiface, index);
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int bpid = cvmx_helper_get_bpid(xiface, index);
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lp_pknd.u64 = csr_rd(CVMX_PKO_REG_LOOPBACK_PKIND);
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lp_bpid.u64 = csr_rd(CVMX_PKO_REG_LOOPBACK_BPID);
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if (index == 0)
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lp_pknd.s.num_ports = num_ports;
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switch (index) {
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case 0:
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lp_pknd.s.pkind0 = pknd;
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lp_bpid.s.bpid0 = bpid;
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break;
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case 1:
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lp_pknd.s.pkind1 = pknd;
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lp_bpid.s.bpid1 = bpid;
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break;
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case 2:
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lp_pknd.s.pkind2 = pknd;
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lp_bpid.s.bpid2 = bpid;
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break;
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case 3:
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lp_pknd.s.pkind3 = pknd;
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lp_bpid.s.bpid3 = bpid;
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break;
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case 4:
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lp_pknd.s.pkind4 = pknd;
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lp_bpid.s.bpid4 = bpid;
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break;
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case 5:
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lp_pknd.s.pkind5 = pknd;
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lp_bpid.s.bpid5 = bpid;
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break;
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case 6:
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lp_pknd.s.pkind6 = pknd;
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lp_bpid.s.bpid6 = bpid;
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break;
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case 7:
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lp_pknd.s.pkind7 = pknd;
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lp_bpid.s.bpid7 = bpid;
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break;
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}
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csr_wr(CVMX_PKO_REG_LOOPBACK_PKIND, lp_pknd.u64);
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csr_wr(CVMX_PKO_REG_LOOPBACK_BPID, lp_bpid.u64);
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}
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} else if (octeon_has_feature(OCTEON_FEATURE_BGX)) {
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cvmx_lbk_chx_pkind_t lbk_pkind;
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for (index = 0; index < num_ports; index++) {
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lbk_pkind.u64 = 0;
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lbk_pkind.s.pkind = cvmx_helper_get_pknd(xiface, index);
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csr_wr_node(xi.node, CVMX_LBK_CHX_PKIND(index),
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lbk_pkind.u64);
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}
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}
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return 0;
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}
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