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https://github.com/u-boot/u-boot.git
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ftsdc010: improve performance and capability
This patch improve the performance by spliting flag examination code in ftsdc010_send_cmd() into 3 functions. This patch also reordered the function which made better capability to some high performance cards against to the next version of ftsdc010 hardware. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
This commit is contained in:
Macpaul Lin
Andy Fleming
parent
2c3fbf4cbe
commit
31cb6db5db
@ -90,8 +90,13 @@ static void ftsdc010_pio_read(struct mmc_host *host, char *buf, unsigned int siz
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while (size) {
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status = readl(&host->reg->status);
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debug("%s: size: %08x\n", __func__, size);
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if (status & FTSDC010_STATUS_FIFO_ORUN) {
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debug("%s: FIFO OVERRUN: sta: %08x\n",
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__func__, status);
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fifo = host->fifo_len > size ?
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size : host->fifo_len;
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@ -146,7 +151,7 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
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while (size) {
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status = readl(&host->reg->status);
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if (status & FTSDC010_STATUS_FIFO_ORUN) {
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if (status & FTSDC010_STATUS_FIFO_URUN) {
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fifo = host->fifo_len > size ?
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size : host->fifo_len;
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@ -158,7 +163,6 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
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writel(*ptr, &host->reg->dwr);
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ptr++;
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}
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} else {
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udelay(1);
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if (++retry >= FTSDC010_PIO_RETRY) {
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@ -169,56 +173,19 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
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}
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}
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static int ftsdc010_pio_check_status(struct mmc *mmc, struct mmc_cmd *cmd,
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static int ftsdc010_check_rsp(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct mmc_host *host = mmc->priv;
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unsigned int sta, clear;
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unsigned int i;
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/* check response and hardware status */
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clear = 0;
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/* chech CMD_SEND */
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for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
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sta = readl(&host->reg->status);
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/* Command Complete */
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if (sta & FTSDC010_STATUS_CMD_SEND) {
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if (!data)
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clear |= FTSDC010_CLR_CMD_SEND;
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break;
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}
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}
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if (i > FTSDC010_CMD_RETRY) {
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printf("%s: send command timeout\n", __func__);
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return TIMEOUT;
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}
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/* debug: print status register and command index*/
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debug("sta: %08x cmd %d\n", sta, cmd->cmdidx);
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/* handle data FIFO */
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if ((sta & FTSDC010_STATUS_FIFO_ORUN) ||
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(sta & FTSDC010_STATUS_FIFO_URUN)) {
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/* Wrong DATA FIFO Flag */
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if (data == NULL)
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printf("%s, data fifo wrong: sta: %08x cmd %d\n",
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__func__, sta, cmd->cmdidx);
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if (sta & FTSDC010_STATUS_FIFO_ORUN)
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clear |= FTSDC010_STATUS_FIFO_ORUN;
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if (sta & FTSDC010_STATUS_FIFO_URUN)
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clear |= FTSDC010_STATUS_FIFO_URUN;
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}
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sta = readl(&host->reg->status);
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debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
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/* check RSP TIMEOUT or FAIL */
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if (sta & FTSDC010_STATUS_RSP_TIMEOUT) {
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/* RSP TIMEOUT */
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debug("%s: RSP timeout: sta: %08x cmd %d\n",
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__func__, sta, cmd->cmdidx);
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debug("%s: RSP timeout: sta: %08x\n", __func__, sta);
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clear |= FTSDC010_CLR_RSP_TIMEOUT;
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writel(clear, &host->reg->clr);
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@ -226,47 +193,62 @@ static int ftsdc010_pio_check_status(struct mmc *mmc, struct mmc_cmd *cmd,
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return TIMEOUT;
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} else if (sta & FTSDC010_STATUS_RSP_CRC_FAIL) {
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/* clear response fail bit */
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debug("%s: RSP CRC FAIL: sta: %08x cmd %d\n",
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__func__, sta, cmd->cmdidx);
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debug("%s: RSP CRC FAIL: sta: %08x\n", __func__, sta);
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clear |= FTSDC010_CLR_RSP_CRC_FAIL;
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writel(clear, &host->reg->clr);
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return 0;
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return COMM_ERR;
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} else if (sta & FTSDC010_STATUS_RSP_CRC_OK) {
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/* clear response CRC OK bit */
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clear |= FTSDC010_CLR_RSP_CRC_OK;
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}
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writel(clear, &host->reg->clr);
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return 0;
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}
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static int ftsdc010_check_data(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct mmc_host *host = mmc->priv;
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unsigned int sta, clear;
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sta = readl(&host->reg->status);
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debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
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/* check DATA TIMEOUT or FAIL */
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if (data) {
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/* Transfer Complete */
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if (sta & FTSDC010_STATUS_DATA_END)
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clear |= FTSDC010_STATUS_DATA_END;
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/* Data CRC_OK */
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if (sta & FTSDC010_STATUS_DATA_CRC_OK)
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clear |= FTSDC010_STATUS_DATA_CRC_OK;
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/* DATA TIMEOUT or DATA CRC FAIL */
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if (sta & FTSDC010_STATUS_DATA_TIMEOUT) {
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/* DATA TIMEOUT */
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debug("%s: DATA TIMEOUT: sta: %08x\n",
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__func__, sta);
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debug("%s: DATA TIMEOUT: sta: %08x\n", __func__, sta);
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clear |= FTSDC010_STATUS_DATA_TIMEOUT;
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writel(sta, &host->reg->clr);
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writel(clear, &host->reg->clr);
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return TIMEOUT;
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} else if (sta & FTSDC010_STATUS_DATA_CRC_FAIL) {
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/* Error Interrupt */
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debug("%s: DATA CRC FAIL: sta: %08x\n",
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__func__, sta);
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/* DATA CRC FAIL */
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debug("%s: DATA CRC FAIL: sta: %08x\n", __func__, sta);
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clear |= FTSDC010_STATUS_DATA_CRC_FAIL;
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writel(clear, &host->reg->clr);
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return 0;
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} else if (sta & FTSDC010_STATUS_DATA_END) {
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/* Transfer Complete */
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clear |= FTSDC010_STATUS_DATA_END;
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return COMM_ERR;
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}
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writel(clear, &host->reg->clr);
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}
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/* transaction is success and clear status register */
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writel(clear, &host->reg->clr);
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return 0;
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}
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@ -281,6 +263,9 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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unsigned int ccon;
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unsigned int mask, tmpmask;
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unsigned int ret;
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unsigned int sta, i;
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ret = 0;
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if (data)
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mask = FTSDC010_INT_MASK_RSP_TIMEOUT;
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@ -290,13 +275,9 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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mask = FTSDC010_INT_MASK_CMD_SEND;
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/* write argu reg */
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debug("%s: cmd->arg: %08x\n", __func__, cmd->cmdarg);
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debug("%s: argu: %08x\n", __func__, host->reg->argu);
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writel(cmd->cmdarg, &host->reg->argu);
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/* setup cmd reg */
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debug("cmd: %d\n", cmd->cmdidx);
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debug("resp: %08x\n", cmd->resp_type);
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/* setup commnad */
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ccon = FTSDC010_CMD_IDX(cmd->cmdidx);
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@ -340,7 +321,51 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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/* write cmd reg */
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debug("%s: ccon: %08x\n", __func__, ccon);
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writel(ccon, &host->reg->cmd);
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udelay(4*FTSDC010_DELAY_UNIT);
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/* check CMD_SEND */
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for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
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/*
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* If we read status register too fast
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* will lead hardware error and the RSP_TIMEOUT
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* flag will be raised incorrectly.
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*/
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udelay(16*FTSDC010_DELAY_UNIT);
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sta = readl(&host->reg->status);
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/* Command Complete */
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/*
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* Note:
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* Do not clear FTSDC010_CLR_CMD_SEND flag.
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* (by writing FTSDC010_CLR_CMD_SEND bit to clear register)
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* It will make the driver becomes very slow.
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* If the operation hasn't been finished, hardware will
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* clear this bit automatically.
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* In origin, the driver will clear this flag if there is
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* no data need to be read.
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*/
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if (sta & FTSDC010_STATUS_CMD_SEND)
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break;
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}
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if (i > FTSDC010_CMD_RETRY) {
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printf("%s: send command timeout\n", __func__);
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return TIMEOUT;
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}
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/* check rsp status */
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ret = ftsdc010_check_rsp(mmc, cmd, data);
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if (ret)
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return ret;
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/* read response if we have RSP_OK */
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if (ccon & FTSDC010_CMD_LONG_RSP) {
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cmd->response[0] = readl(&host->reg->rsp3);
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cmd->response[1] = readl(&host->reg->rsp2);
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cmd->response[2] = readl(&host->reg->rsp1);
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cmd->response[3] = readl(&host->reg->rsp0);
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} else {
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cmd->response[0] = readl(&host->reg->rsp0);
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}
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/* read/write data */
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if (data && (data->flags & MMC_DATA_READ)) {
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@ -351,19 +376,11 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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data->blocksize * data->blocks);
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}
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/* pio check response status */
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ret = ftsdc010_pio_check_status(mmc, cmd, data);
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if (!ret) {
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/* if it is long response */
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if (ccon & FTSDC010_CMD_LONG_RSP) {
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cmd->response[0] = readl(&host->reg->rsp3);
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cmd->response[1] = readl(&host->reg->rsp2);
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cmd->response[2] = readl(&host->reg->rsp1);
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cmd->response[3] = readl(&host->reg->rsp0);
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} else {
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cmd->response[0] = readl(&host->reg->rsp0);
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}
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/* check data status */
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if (data) {
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ret = ftsdc010_check_data(mmc, cmd, data);
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if (ret)
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return ret;
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}
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udelay(FTSDC010_DELAY_UNIT);
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@ -431,8 +448,6 @@ static int ftsdc010_setup_data(struct mmc *mmc, struct mmc_data *data)
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/* always reset fifo since last transfer may fail */
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dcon |= FTSDC010_DCR_FIFO_RST;
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/* handle sdio */
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dcon = data->blocksize | data->blocks << 15;
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if (data->blocks > 1)
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dcon |= FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE;
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#endif
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@ -497,7 +512,7 @@ static void ftsdc010_set_clk(struct mmc *mmc)
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{
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struct mmc_host *host = mmc->priv;
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unsigned char clk_div;
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unsigned char real_rate;
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unsigned int real_rate;
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unsigned int clock;
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debug("%s: mmc_set_clock: %x\n", __func__, mmc->clock);
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@ -518,7 +533,7 @@ static void ftsdc010_set_clk(struct mmc *mmc)
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break;
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}
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debug("%s: computed real_rete: %x, clk_div: %x\n",
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debug("%s: computed real_rate: %x, clk_div: %x\n",
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__func__, real_rate, clk_div);
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if (clk_div > 127)
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@ -579,6 +594,7 @@ static void ftsdc010_set_ios(struct mmc *mmc)
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static void ftsdc010_reset(struct mmc_host *host)
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{
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unsigned int timeout;
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unsigned int sta;
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/* Do SDC_RST: Software reset for all register */
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writel(FTSDC010_CMD_SDC_RST, &host->reg->cmd);
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@ -598,6 +614,10 @@ static void ftsdc010_reset(struct mmc_host *host)
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timeout--;
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udelay(10*FTSDC010_DELAY_UNIT);
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}
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sta = readl(&host->reg->status);
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if (sta & FTSDC010_STATUS_CARD_CHANGE)
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writel(FTSDC010_CLR_CARD_CHANGE, &host->reg->clr);
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}
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static int ftsdc010_core_init(struct mmc *mmc)
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@ -650,8 +670,6 @@ int ftsdc010_mmc_init(int dev_index)
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mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
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mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
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mmc->f_min = CONFIG_SYS_CLK_FREQ / 2 / (2*128);
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mmc->f_max = CONFIG_SYS_CLK_FREQ / 2 / 2;
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