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arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Add support for detection J7200 SoC Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
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@ -355,6 +355,16 @@ bool soc_is_j721e(void)
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return soc == J721E;
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}
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bool soc_is_j7200(void)
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{
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u32 soc;
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soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
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JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
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return soc == J7200;
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}
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#ifdef CONFIG_ARM64
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void board_prep_linux(bootm_headers_t *images)
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{
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@ -9,6 +9,7 @@
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#include <asm/armv7_mpu.h>
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#define J721E 0xbb64
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#define J7200 0xbb6d
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struct fwl_data {
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const char *name;
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@ -17,5 +17,6 @@ void release_resources_for_core_shutdown(void);
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int fdt_disable_node(void *blob, char *node_path);
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bool soc_is_j721e(void);
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bool soc_is_j7200(void);
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#endif
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