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Flex bus definition update for Coldfire 5253.
originally work by Jate Sujjavanich <jsujjavanich@syntech-fuelmaster.com> ---- The defines in arch/m68k/include/coldfire/flexbus.h are not compatible with the 5235 processor. The registers in struct fbcs are different sizes from those in the 5235. Also, the defines are a little different. This is what I have so far. Comments? ---- Reformat the patch manually by Jason Jin Signed-off-by: Jate Sujjavanich <jsujjavanich@syntech-fuelmaster.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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@ -29,7 +29,57 @@
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/*********************************************************************
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* FlexBus Chip Selects (FBCS)
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*********************************************************************/
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#ifdef CONFIG_M5235
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typedef struct fbcs {
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u16 csar0; /* Chip-select Address */
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u16 res1;
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u32 csmr0; /* Chip-select Mask */
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u16 res2;
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u16 cscr0; /* Chip-select Control */
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u16 csar1;
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u16 res3;
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u32 csmr1;
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u16 res4;
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u16 cscr1;
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u16 csar2;
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u16 res5;
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u32 csmr2;
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u16 res6;
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u16 cscr2;
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u16 csar3;
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u16 res7;
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u32 csmr3;
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u16 res8;
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u16 cscr3;
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u16 csar4;
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u16 res9;
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u32 csmr4;
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u16 res10;
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u16 cscr4;
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u16 csar5;
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u16 res11;
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u32 csmr5;
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u16 res12;
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u16 cscr5;
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u16 csar6;
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u16 res13;
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u32 csmr6;
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u16 res14;
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u16 cscr6;
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u16 csar7;
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u16 res15;
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u32 csmr7;
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u16 res16;
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u16 cscr7;
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} fbcs_t;
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#else
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typedef struct fbcs {
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u32 csar0; /* Chip-select Address */
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u32 csmr0; /* Chip-select Mask */
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@ -56,6 +106,7 @@ typedef struct fbcs {
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u32 csmr7;
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u32 cscr7;
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} fbcs_t;
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#endif
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#define FBCS_CSAR_BA(x) ((x) & 0xFFFF0000)
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@ -94,6 +145,22 @@ typedef struct fbcs {
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#endif
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#define FBCS_CSMR_V (0x00000001) /* Valid bit */
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#ifdef CONFIG_M5235
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#define FBCS_CSCR_SRWS(x) (((x) & 0x3) << 14)
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#define FBCS_CSCR_IWS(x) (((x) & 0xF) << 10)
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#define FBCS_CSCR_AA_ON (1 << 8)
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#define FBCS_CSCR_AA_OFF (0 << 8)
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#define FBCS_CSCR_PS_32 (0 << 6)
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#define FBCS_CSCR_PS_16 (2 << 6)
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#define FBCS_CSCR_PS_8 (1 << 6)
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#define FBCS_CSCR_BEM_ON (1 << 5)
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#define FBCS_CSCR_BEM_OFF (0 << 5)
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#define FBCS_CSCR_BSTR_ON (1 << 4)
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#define FBCS_CSCR_BSTR_OFF (0 << 4)
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#define FBCS_CSCR_BSTW_ON (1 << 3)
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#define FBCS_CSCR_BSTW_OFF (0 << 3)
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#define FBCS_CSCR_SWWS(x) (((x) & 0x7) << 0)
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#else
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#define FBCS_CSCR_SWS(x) (((x) & 0x3F) << 26)
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#define FBCS_CSCR_SWS_MASK (0x03FFFFFF)
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#define FBCS_CSCR_SWSEN (0x00800000)
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@ -116,5 +183,6 @@ typedef struct fbcs {
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#define FBCS_CSCR_PS_16 (0x00000080)
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#define FBCS_CSCR_PS_8 (0x00000040)
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#define FBCS_CSCR_PS_32 (0x00000000)
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#endif
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#endif /* __FLEXBUS_H */
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