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ARM: tegra: update Venice2 pinmux
This re-imports the entire Venice2 pinmux data from the board's master spreadsheet, and makes use of the new IO clamping GPIO initialization table features. This makes the board port fully compliant with the required HW-defined pinmux initialization sequence. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Stephen Warren
Tom Warren
parent
4ff213b8e4
commit
2eba87a30a
@ -1,76 +1,282 @@
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/*
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/*
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* (C) Copyright 2013
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* Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
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* NVIDIA Corporation <www.nvidia.com>
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+
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*/
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*/
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#ifndef _PINMUX_CONFIG_VENICE2_H_
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#ifndef _PINMUX_CONFIG_VENICE2_H_
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#define _PINMUX_CONFIG_VENICE2_H_
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#define _PINMUX_CONFIG_VENICE2_H_
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#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
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#define GPIO_INIT(_gpio, _init) \
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{ \
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{ \
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.pingrp = PMUX_PINGRP_##_pingrp, \
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.gpio = GPIO_P##_gpio, \
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.func = PMUX_FUNC_##_mux, \
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.init = TEGRA_GPIO_INIT_##_init, \
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.pull = PMUX_PULL_##_pull, \
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.tristate = PMUX_TRI_##_tri, \
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.io = PMUX_PIN_##_io, \
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.lock = PMUX_PIN_LOCK_DEFAULT, \
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.od = PMUX_PIN_OD_DEFAULT, \
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.ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
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}
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}
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#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
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static const struct tegra_gpio_config venice2_gpio_inits[] = {
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/* gpio, init_val */
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GPIO_INIT(A0, IN),
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GPIO_INIT(C7, IN),
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GPIO_INIT(G0, IN),
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GPIO_INIT(G1, IN),
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GPIO_INIT(G2, IN),
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GPIO_INIT(G3, IN),
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GPIO_INIT(H2, IN),
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GPIO_INIT(H4, IN),
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GPIO_INIT(H5, OUT0),
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GPIO_INIT(H6, IN),
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GPIO_INIT(H7, OUT1),
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GPIO_INIT(I0, IN),
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GPIO_INIT(I1, IN),
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GPIO_INIT(I2, OUT0),
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GPIO_INIT(I4, OUT0),
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GPIO_INIT(I6, IN),
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GPIO_INIT(J0, IN),
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GPIO_INIT(J7, IN),
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GPIO_INIT(K0, IN),
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GPIO_INIT(K1, OUT0),
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GPIO_INIT(K2, IN),
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GPIO_INIT(K3, IN),
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GPIO_INIT(K4, OUT0),
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GPIO_INIT(K6, OUT0),
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GPIO_INIT(K7, IN),
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GPIO_INIT(N7, IN),
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GPIO_INIT(O2, IN),
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GPIO_INIT(O5, IN),
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GPIO_INIT(O6, OUT0),
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GPIO_INIT(O7, IN),
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GPIO_INIT(P2, OUT0),
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GPIO_INIT(Q0, IN),
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GPIO_INIT(Q3, IN),
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GPIO_INIT(R0, OUT0),
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GPIO_INIT(R1, IN),
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GPIO_INIT(R4, IN),
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GPIO_INIT(S0, IN),
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GPIO_INIT(S3, OUT0),
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GPIO_INIT(S4, OUT0),
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GPIO_INIT(S7, IN),
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GPIO_INIT(T1, IN),
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GPIO_INIT(U4, IN),
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GPIO_INIT(U5, IN),
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GPIO_INIT(U6, IN),
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GPIO_INIT(V0, IN),
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GPIO_INIT(V1, IN),
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GPIO_INIT(W3, IN),
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GPIO_INIT(X1, IN),
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GPIO_INIT(X3, IN),
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GPIO_INIT(X4, IN),
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GPIO_INIT(X7, OUT0),
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GPIO_INIT(CC5, OUT0),
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};
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#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \
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{ \
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{ \
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.pingrp = PMUX_PINGRP_##_pingrp, \
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.pingrp = PMUX_PINGRP_##_pingrp, \
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.func = PMUX_FUNC_##_mux, \
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.func = PMUX_FUNC_##_mux, \
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.pull = PMUX_PULL_##_pull, \
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.pull = PMUX_PULL_##_pull, \
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.tristate = PMUX_TRI_##_tri, \
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.tristate = PMUX_TRI_##_tri, \
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.io = PMUX_PIN_##_io, \
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.io = PMUX_PIN_##_io, \
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.lock = PMUX_PIN_LOCK_##_lock, \
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.od = PMUX_PIN_OD_##_od, \
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.od = PMUX_PIN_OD_##_od, \
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.ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
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}
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#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
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{ \
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.pingrp = PMUX_PINGRP_##_pingrp, \
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.func = PMUX_FUNC_##_mux, \
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.pull = PMUX_PULL_##_pull, \
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.tristate = PMUX_TRI_##_tri, \
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.io = PMUX_PIN_##_io, \
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.lock = PMUX_PIN_LOCK_##_lock, \
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.rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
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.rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
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.lock = PMUX_PIN_LOCK_DEFAULT, \
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.ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
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.ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
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}
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}
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#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
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static const struct pmux_pingrp_config venice2_pingrps[] = {
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{ \
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/* pingrp, mux, pull, tri, e_input, od, rcv_sel */
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.pingrp = PMUX_PINGRP_##_pingrp, \
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PINCFG(CLK_32K_OUT_PA0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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.func = PMUX_FUNC_##_mux, \
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PINCFG(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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.pull = PMUX_PULL_##_pull, \
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PINCFG(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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.tristate = PMUX_TRI_##_tri, \
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PINCFG(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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.io = PMUX_PIN_##_io, \
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PINCFG(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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.lock = PMUX_PIN_LOCK_##_lock, \
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PINCFG(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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.od = PMUX_PIN_OD_DEFAULT, \
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PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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.ioreset = PMUX_PIN_IO_RESET_##_ioreset \
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PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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}
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PINCFG(PB0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PB1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(UART2_RXD_PC3, IRDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
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PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
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PINCFG(PC7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PG0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PG1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PG2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PG3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PG4, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PG7, SPI4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PH2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PH3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PH4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PH5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PH6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PI0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PI1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PI4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PI5, RSVD2, UP, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PI6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PJ0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PJ2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PJ7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PK2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PK3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PK4, DEFAULT, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(SPDIF_OUT_PK5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(SPDIF_IN_PK6, DEFAULT, DOWN, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PK7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
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PINCFG(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
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PINCFG(HDMI_INT_PN7, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, NORMAL),
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PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA1_PO2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA4_PO5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA5_PO6, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(ULPI_DATA6_PO7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(DAP3_FS_PP0, I2S2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DAP3_DIN_PP1, I2S2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DAP3_DOUT_PP2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DAP3_SCLK_PP3, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL0_PQ0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL1_PQ1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL2_PQ2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL3_PQ3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL5_PQ5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL6_PQ6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_COL7_PQ7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW0_PR0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW1_PR1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW2_PR2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW4_PR4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW7_PR7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW8_PS0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW9_PS1, UARTA, DOWN, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW10_PS2, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW11_PS3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW12_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW15_PS7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(KB_ROW17_PT1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
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PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
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PINCFG(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PU1, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PU2, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PU3, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PU4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PU5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PU6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PV0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(PV1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(SDMMC1_WP_N_PV3, SDMMC1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
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PINCFG(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
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PINCFG(GPIO_W2_AUD_PW2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(GPIO_W3_AUD_PW3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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||||||
|
PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CLK2_OUT_PW5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(GPIO_X1_AUD_PX1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(GPIO_X3_AUD_PX3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(GPIO_X4_AUD_PX4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(GPIO_X5_AUD_PX5, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(GPIO_X6_AUD_PX6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(GPIO_X7_AUD_PX7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
||||||
|
PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PBB0, VGP6, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
||||||
|
PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
||||||
|
PINCFG(PBB3, VGP3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PBB4, VGP4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PBB5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PBB6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CAM_MCLK_PCC0, VI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CLK2_REQ_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PEX_L0_RST_N_PDD1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PEX_WAKE_N_PDD3, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PEX_L1_RST_N_PDD5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
||||||
|
PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(DP_HPD_PFF0, DP, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(USB_VBUS_EN2_PFF1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||||
|
PINCFG(PFF2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||||
|
PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(PWR_INT_N, PMI, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(OWR, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, NORMAL),
|
||||||
|
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
|
PINCFG(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
};
|
||||||
|
|
||||||
#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
|
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
||||||
{ \
|
|
||||||
.pingrp = PMUX_PINGRP_##_pingrp, \
|
|
||||||
.func = PMUX_FUNC_##_mux, \
|
|
||||||
.pull = PMUX_PULL_##_pull, \
|
|
||||||
.tristate = PMUX_TRI_##_tri, \
|
|
||||||
.io = PMUX_PIN_##_io, \
|
|
||||||
.lock = PMUX_PIN_LOCK_##_lock, \
|
|
||||||
.od = PMUX_PIN_OD_##_od, \
|
|
||||||
.ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
|
|
||||||
}
|
|
||||||
|
|
||||||
#define USB_PINMUX CEC_PINMUX
|
|
||||||
|
|
||||||
#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
|
||||||
{ \
|
{ \
|
||||||
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
||||||
.slwf = _slwf, \
|
.slwf = _slwf, \
|
||||||
@ -82,258 +288,7 @@
|
|||||||
.hsm = PMUX_HSM_##_hsm, \
|
.hsm = PMUX_HSM_##_hsm, \
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct pmux_pingrp_config tegra124_pinmux_common[] = {
|
static const struct pmux_drvgrp_config venice2_drvgrps[] = {
|
||||||
/* EXTPERIPH1 pinmux */
|
|
||||||
DEFAULT_PINMUX(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* I2S0 pinmux */
|
|
||||||
DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* I2S1 pinmux */
|
|
||||||
DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* I2S3 pinmux */
|
|
||||||
DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* CLDVFS pinmux */
|
|
||||||
DEFAULT_PINMUX(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* ULPI pinmux */
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA0_PO1, ULPI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA1_PO2, ULPI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA2_PO3, ULPI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA3_PO4, ULPI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA4_PO5, ULPI, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA5_PO6, ULPI, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA6_PO7, ULPI, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* EC KBC/SPI */
|
|
||||||
DEFAULT_PINMUX(ULPI_CLK_PY0, SPI1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DIR_PY1, SPI1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* I2C3 (TPM) pinmux */
|
|
||||||
I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
|
|
||||||
/* I2C2 pinmux */
|
|
||||||
I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
|
|
||||||
/* UARTD pinmux (UART4 on Servo board, unused) */
|
|
||||||
DEFAULT_PINMUX(PJ7, UARTD, NORMAL, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(PB0, UARTD, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PB1, UARTD, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PK7, UARTD, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* SPI4 (Winbond 'boot ROM') */
|
|
||||||
DEFAULT_PINMUX(PG5, SPI4, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PG6, SPI4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PG7, SPI4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PI3, SPI4, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* Touch IRQ */
|
|
||||||
DEFAULT_PINMUX(GPIO_W3_AUD_PW3, RSVD1, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* PWM1 pinmux */
|
|
||||||
DEFAULT_PINMUX(PH1, PWM1, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* SDMMC1 pinmux */
|
|
||||||
DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* SDMMC3 pinmux */
|
|
||||||
DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, DOWN, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* SDMMC4 pinmux */
|
|
||||||
DEFAULT_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* BLINK pinmux */
|
|
||||||
DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* KBC pinmux */
|
|
||||||
DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* Misc */
|
|
||||||
DEFAULT_PINMUX(PV0, RSVD1, NORMAL, TRISTATE, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW7_PR7, RSVD1, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* UARTA pinmux (BR_UART_TXD/RXD on Servo board) */
|
|
||||||
DEFAULT_PINMUX(KB_ROW9_PS1, UARTA, UP, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW10_PS2, UARTA, UP, TRISTATE, INPUT),
|
|
||||||
|
|
||||||
/* I2CPWR pinmux (I2C5) */
|
|
||||||
I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
|
|
||||||
/* RTCK pinmux */
|
|
||||||
DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* CLK pinmux */
|
|
||||||
DEFAULT_PINMUX(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT),
|
|
||||||
|
|
||||||
/* PWRON pinmux */
|
|
||||||
DEFAULT_PINMUX(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* CPU pinmux */
|
|
||||||
DEFAULT_PINMUX(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* PMI pinmux */
|
|
||||||
DEFAULT_PINMUX(PWR_INT_N, PMI, NORMAL, TRISTATE, INPUT),
|
|
||||||
|
|
||||||
/* RESET_OUT_N pinmux */
|
|
||||||
DEFAULT_PINMUX(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* EXTPERIPH3 pinmux */
|
|
||||||
DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* I2C1 pinmux */
|
|
||||||
I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
|
|
||||||
/* UARTB, GPS */
|
|
||||||
DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* UARTC (WIFI/BT) */
|
|
||||||
DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* CEC pinmux */
|
|
||||||
CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
|
|
||||||
|
|
||||||
/* I2C4 (HDMI_DDC) pinmux */
|
|
||||||
DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
|
|
||||||
DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
|
|
||||||
|
|
||||||
/* USB pinmux */
|
|
||||||
USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
USB_PINMUX(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
|
|
||||||
|
|
||||||
/* Unused, marked SNN_ on schematic, TRISTATE 'em */
|
|
||||||
DEFAULT_PINMUX(PBB0, RSVD3, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PBB3, RSVD3, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PBB4, RSVD3, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PBB5, RSVD2, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PBB6, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PBB7, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PCC2, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PH3, GMI, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PI7, GMI, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PJ2, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(GPIO_X5_AUD_PX5, RSVD3, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(GPIO_X6_AUD_PX6, GMI, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(GPIO_W2_AUD_PW2, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(PFF2, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(USB_VBUS_EN2_PFF1, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_COL5_PQ5, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW2_PR2, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW3_PR3, KBC, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW5_PR5, RSVD2, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW13_PS5, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW14_PS6, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW16_PT0, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(OWR, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(ULPI_DATA7_PO0, ULPI, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP3_DIN_PP1, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP3_FS_PP0, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(DAP3_SCLK_PP3, RSVD2, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(CLK2_OUT_PW5, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC1_WP_N_PV3, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(CAM_MCLK_PCC0, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(CLK3_REQ_PEE1, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
DEFAULT_PINMUX(SPDIF_OUT_PK5, RSVD1, NORMAL, TRISTATE, INPUT),
|
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct pmux_pingrp_config unused_pins_lowpower[] = {
|
|
||||||
DEFAULT_PINMUX(DAP_MCLK1_REQ_PEE2, RSVD3, DOWN, TRISTATE, OUTPUT),
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Initially setting all used GPIO's to non-TRISTATE */
|
|
||||||
static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = {
|
|
||||||
DEFAULT_PINMUX(GPIO_X4_AUD_PX4, RSVD1, DOWN, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(GPIO_X7_AUD_PX7, RSVD1, DOWN, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(GPIO_W2_AUD_PW2, RSVD1, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(GPIO_X3_AUD_PX3, RSVD3, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* EN_VDD_BL */
|
|
||||||
DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, DOWN, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
/* MODEM */
|
|
||||||
DEFAULT_PINMUX(PV0, RSVD3, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* BOOT_SEL0-3 */
|
|
||||||
DEFAULT_PINMUX(PG0, GMI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PG1, GMI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PG2, GMI, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PG3, GMI, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
DEFAULT_PINMUX(CLK2_REQ_PCC5, RSVD3, NORMAL, NORMAL, OUTPUT),
|
|
||||||
|
|
||||||
DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(KB_COL7_PQ7, KBC, UP, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW4_PR4, KBC, DOWN, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
DEFAULT_PINMUX(PU4, RSVD3, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(PU5, RSVD3, NORMAL, NORMAL, OUTPUT),
|
|
||||||
DEFAULT_PINMUX(PU6, RSVD3, NORMAL, NORMAL, INPUT),
|
|
||||||
|
|
||||||
DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, DOWN, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SPDIF_IN_PK6, RSVD2, NORMAL, NORMAL, INPUT),
|
|
||||||
DEFAULT_PINMUX(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT),
|
|
||||||
|
|
||||||
/* TS_SHDN_L */
|
|
||||||
DEFAULT_PINMUX(PK1, GMI, NORMAL, NORMAL, OUTPUT),
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct pmux_drvgrp_config venice2_padctrl[] = {
|
|
||||||
/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
|
|
||||||
DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
|
|
||||||
SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
|
|
||||||
};
|
|
||||||
#endif /* PINMUX_CONFIG_VENICE2_H */
|
#endif /* PINMUX_CONFIG_VENICE2_H */
|
||||||
|
|||||||
@ -6,12 +6,9 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <asm-generic/gpio.h>
|
|
||||||
#include <asm/arch/gpio.h>
|
#include <asm/arch/gpio.h>
|
||||||
#include <asm/arch/gp_padctrl.h>
|
|
||||||
#include <asm/arch/pinmux.h>
|
#include <asm/arch/pinmux.h>
|
||||||
#include "pinmux-config-venice2.h"
|
#include "pinmux-config-venice2.h"
|
||||||
#include <i2c.h>
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Routine: pinmux_init
|
* Routine: pinmux_init
|
||||||
@ -19,16 +16,14 @@
|
|||||||
*/
|
*/
|
||||||
void pinmux_init(void)
|
void pinmux_init(void)
|
||||||
{
|
{
|
||||||
pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate,
|
pinmux_set_tristate_input_clamping();
|
||||||
ARRAY_SIZE(tegra124_pinmux_set_nontristate));
|
|
||||||
|
|
||||||
pinmux_config_pingrp_table(tegra124_pinmux_common,
|
gpio_config_table(venice2_gpio_inits,
|
||||||
ARRAY_SIZE(tegra124_pinmux_common));
|
ARRAY_SIZE(venice2_gpio_inits));
|
||||||
|
|
||||||
pinmux_config_pingrp_table(unused_pins_lowpower,
|
pinmux_config_pingrp_table(venice2_pingrps,
|
||||||
ARRAY_SIZE(unused_pins_lowpower));
|
ARRAY_SIZE(venice2_pingrps));
|
||||||
|
|
||||||
/* Initialize any non-default pad configs (APB_MISC_GP regs) */
|
pinmux_config_drvgrp_table(venice2_drvgrps,
|
||||||
pinmux_config_drvgrp_table(venice2_padctrl,
|
ARRAY_SIZE(venice2_drvgrps));
|
||||||
ARRAY_SIZE(venice2_padctrl));
|
|
||||||
}
|
}
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user