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MPC85xx: Load and enable QE microcode patch in IRAM

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For the silicon which doesn't have ROM support in QE, it always needs to load
a pre-built ucode binary to IRAM so that QE can work.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
This commit is contained in:
Haiying Wang 2009-03-26 17:01:49 -04:00 committed by Kumar Gala
parent 1b3e4044a2
commit 2d4de6ae5b
2 changed files with 10 additions and 0 deletions
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9
drivers/qe/qe.c
View File

@ -161,6 +161,15 @@ void qe_init(uint qe_base)
/* Init the QE IMMR base */
qe_immr = (qe_map_t *)qe_base;
#ifdef CONFIG_SYS_QE_FW_ADDR
/* Upload microcode to IRAM for those SOCs which do not have ROM in QE.
*/
qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR);
/* enable the microcode in IRAM */
out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
#endif
gd->mp_alloc_base = QE_DATAONLY_BASE;
gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;

1
drivers/qe/qe.h
View File

@ -230,6 +230,7 @@ typedef enum qe_clock {
/* I-RAM */
#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
#define QE_IRAM_READY 0x80000000
/* Structure that defines QE firmware binary files.
*