mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-24 20:54:24 +08:00
m68k: ColdFire mcf5441x, add eSDHC support
This patch adds mcf5441x eSDHC support for the mcf5441x family. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
This commit is contained in:
parent
faae49543a
commit
2c92e4fbc6
@ -173,6 +173,15 @@ void cpu_init_f(void)
|
||||
|
||||
/* Lowest slew rate for UART0,1,2 */
|
||||
out_8(&gpio->srcr_uart, 0x00);
|
||||
|
||||
#ifdef CONFIG_FSL_ESDHC
|
||||
/* eSDHC pin as faster speed */
|
||||
out_8(&gpio->srcr_sdhc, 0x03);
|
||||
|
||||
/* All esdhc pins as SD */
|
||||
out_8(&gpio->par_sdhch, 0xff);
|
||||
out_8(&gpio->par_sdhcl, 0xff);
|
||||
#endif
|
||||
#endif /* CONFIG_MCF5441x */
|
||||
|
||||
#ifdef CONFIG_MCF5445x
|
||||
@ -534,4 +543,5 @@ void cfspi_release_bus(uint bus, uint cs)
|
||||
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -120,6 +120,8 @@ void setup_5441x_clocks(void)
|
||||
temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;
|
||||
gd->bus_clk = vco / temp; /* bus clock */
|
||||
|
||||
temp = ((pdr & PLL_DR_OUTDIV3_BITS) >> 10) + 1;
|
||||
gd->arch.sdhc_clk = vco / temp;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -18,6 +18,9 @@ struct arch_global_data {
|
||||
unsigned long vco_clk;
|
||||
unsigned long flb_clk;
|
||||
#endif
|
||||
#ifdef CONFIG_MCF5441x
|
||||
unsigned long sdhc_clk;
|
||||
#endif
|
||||
};
|
||||
|
||||
#include <asm-generic/global_data.h>
|
||||
|
Loading…
Reference in New Issue
Block a user