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MIPS: factor out endianess flag handling to arch config.mk

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This is CPU independent and should be configured architecture-wide.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This commit is contained in:
Daniel Schwierzeck 2012-08-21 23:27:37 +02:00
parent d2aa5dca74
commit 2c0e3de384
4 changed files with 21 additions and 22 deletions
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20
arch/mips/config.mk
View File

@ -23,6 +23,22 @@
CROSS_COMPILE ?= mips_4KC-
# Handle special prefix in ELDK 4.0 toolchain
ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
ENDIANNESS := -EL
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
ENDIANNESS := -EL
endif
ifdef CONFIG_SYS_BIG_ENDIAN
ENDIANNESS := -EB
endif
# Default to EB if no endianess is configured
ENDIANNESS ?= -EB
CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
@ -47,8 +63,8 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
# On the other hand, we want PIC in the U-Boot code to relocate it from ROM
# to RAM. $28 is always used as gp.
#
PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic
PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic $(ENDIANNESS)
PLATFORM_CPPFLAGS += -msoft-float
PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib
PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib $(ENDIANNESS)
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
LDFLAGS_FINAL += --gc-sections

19
arch/mips/cpu/mips32/config.mk
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@ -29,21 +29,4 @@
#
MIPSFLAGS := -march=mips32r2
# Handle special prefix in ELDK 4.0 toolchain
ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
ENDIANNESS := -EL
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
ENDIANNESS := -EL
endif
ifdef CONFIG_SYS_BIG_ENDIAN
ENDIANNESS := -EB
endif
# Default to EB if no endianess is configured
ENDIANNESS ?= -EB
PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS)
PLATFORM_LDFLAGS += $(ENDIANNESS)
PLATFORM_CPPFLAGS += $(MIPSFLAGS)

3
arch/mips/cpu/xburst/config.mk
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@ -20,5 +20,4 @@
# MA 02111-1307 USA
#
PLATFORM_CPPFLAGS += -march=mips32 -EL
PLATFORM_LDFLAGS += -EL
PLATFORM_CPPFLAGS += -march=mips32

1
include/configs/qi_lb60.h
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@ -11,6 +11,7 @@
#define __CONFIG_QI_LB60_H
#define CONFIG_MIPS32 /* MIPS32 CPU core */
#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_JZSOC /* Jz SoC */
#define CONFIG_JZ4740 /* Jz4740 SoC */
#define CONFIG_NAND_JZ4740